aboutsummaryrefslogtreecommitdiffstats
path: root/test
diff options
context:
space:
mode:
authorJim Grosbach <grosbach@apple.com>2011-09-01 18:22:13 +0000
committerJim Grosbach <grosbach@apple.com>2011-09-01 18:22:13 +0000
commit2f25d9b9334662e846460e98a8fe2dae4f233068 (patch)
tree675f77377b2b34e1e8ac242745c1077cebc27aa5 /test
parenta39ccdb9d4829548756efaaac0d19ebae8b7ff5d (diff)
downloadexternal_llvm-2f25d9b9334662e846460e98a8fe2dae4f233068.zip
external_llvm-2f25d9b9334662e846460e98a8fe2dae4f233068.tar.gz
external_llvm-2f25d9b9334662e846460e98a8fe2dae4f233068.tar.bz2
ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138952 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/MC/ARM/basic-arm-instructions.s2
1 files changed, 2 insertions, 0 deletions
diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s
index 861d50f..fa52846 100644
--- a/test/MC/ARM/basic-arm-instructions.s
+++ b/test/MC/ARM/basic-arm-instructions.s
@@ -1300,6 +1300,7 @@ Lforward:
rsc r6, r7, r8, lsr r9
rsc r6, r7, r8, asr r9
rscle r6, r7, r8, ror r9
+ rscs r1, r8, #4064
@ destination register is optional
rsc r5, #0xf000
@@ -1325,6 +1326,7 @@ Lforward:
@ CHECK: rsc r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0xe7,0xe0]
@ CHECK: rsc r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0xe7,0xe0]
@ CHECK: rscle r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0xe7,0xd0]
+@ CHECK: rscs r1, r8, #4064 @ encoding: [0xfe,0x1e,0xf8,0xe2]
@ CHECK: rsc r5, r5, #61440 @ encoding: [0x0f,0x5a,0xe5,0xe2]
@ CHECK: rsc r4, r4, r5 @ encoding: [0x05,0x40,0xe4,0xe0]