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author | Evan Cheng <evan.cheng@apple.com> | 2009-07-11 06:43:01 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2009-07-11 06:43:01 +0000 |
commit | 446c428bf394b7113b0f18cbacb5e87b4efd1e14 (patch) | |
tree | f63ecf8675aa5b58199fdf72834a495672403c8a /test | |
parent | dd6f63209cba0003e67470938830de2cb6917336 (diff) | |
download | external_llvm-446c428bf394b7113b0f18cbacb5e87b4efd1e14.zip external_llvm-446c428bf394b7113b0f18cbacb5e87b4efd1e14.tar.gz external_llvm-446c428bf394b7113b0f18cbacb5e87b4efd1e14.tar.bz2 |
Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically.
A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75359 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/Thumb/ispositive.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/Thumb/ldr_frame.ll | 12 |
2 files changed, 14 insertions, 2 deletions
diff --git a/test/CodeGen/Thumb/ispositive.ll b/test/CodeGen/Thumb/ispositive.ll index 91f5970..5891b1f 100644 --- a/test/CodeGen/Thumb/ispositive.ll +++ b/test/CodeGen/Thumb/ispositive.ll @@ -1,7 +1,9 @@ -; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31} +; RUN: llvm-as < %s | llc -march=thumb | FileCheck %s define i32 @test1(i32 %X) { entry: +; CHECK: test1: +; CHECK: lsrs r0, r0, #31 icmp slt i32 %X, 0 ; <i1>:0 [#uses=1] zext i1 %0 to i32 ; <i32>:1 [#uses=1] ret i32 %1 diff --git a/test/CodeGen/Thumb/ldr_frame.ll b/test/CodeGen/Thumb/ldr_frame.ll index 0043fb5..4dd2c47 100644 --- a/test/CodeGen/Thumb/ldr_frame.ll +++ b/test/CodeGen/Thumb/ldr_frame.ll @@ -1,6 +1,8 @@ -; RUN: llvm-as < %s | llc -march=thumb | grep cpy | count 2 +; RUN: llvm-as < %s | llc -march=thumb | FileCheck %s define i32 @f1() { +; CHECK: f1: +; CHECK: ldr r0 %buf = alloca [32 x i32], align 4 %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 0 %tmp1 = load i32* %tmp @@ -8,6 +10,9 @@ define i32 @f1() { } define i32 @f2() { +; CHECK: f2: +; CHECK: mov r0 +; CHECK: ldrb %buf = alloca [32 x i8], align 4 %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 0 %tmp1 = load i8* %tmp @@ -16,6 +21,8 @@ define i32 @f2() { } define i32 @f3() { +; CHECK: f3: +; CHECK: ldr r0 %buf = alloca [32 x i32], align 4 %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 32 %tmp1 = load i32* %tmp @@ -23,6 +30,9 @@ define i32 @f3() { } define i32 @f4() { +; CHECK: f4: +; CHECK: mov r0 +; CHECK: ldrb %buf = alloca [32 x i8], align 4 %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 2 %tmp1 = load i8* %tmp |