diff options
author | Amaury de la Vieuville <amaury.dlv@gmail.com> | 2013-06-24 09:11:53 +0000 |
---|---|---|
committer | Amaury de la Vieuville <amaury.dlv@gmail.com> | 2013-06-24 09:11:53 +0000 |
commit | 4ee72398a15cd7b8e217bb3d34a4e9e0e72caca1 (patch) | |
tree | bd75f19bcaafd51f4a4e9b45d8c1d9c85226ffa3 /test | |
parent | ff08da15cf3d0412ee9cc325fc5a720bcad178f2 (diff) | |
download | external_llvm-4ee72398a15cd7b8e217bb3d34a4e9e0e72caca1.zip external_llvm-4ee72398a15cd7b8e217bb3d34a4e9e0e72caca1.tar.gz external_llvm-4ee72398a15cd7b8e217bb3d34a4e9e0e72caca1.tar.bz2 |
ARM: fix thumb1 nop decoding
In thumb1, NOP is a pseudo-instruction equivalent to mov r8, r8.
However the disassembler should not use this alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184703 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/MC/ARM/thumb-nop.s | 2 | ||||
-rw-r--r-- | test/MC/ARM/thumb.s | 2 | ||||
-rw-r--r-- | test/MC/Disassembler/ARM/thumb1.txt | 10 |
3 files changed, 4 insertions, 10 deletions
diff --git a/test/MC/ARM/thumb-nop.s b/test/MC/ARM/thumb-nop.s index 0b580ea..66f61a6 100644 --- a/test/MC/ARM/thumb-nop.s +++ b/test/MC/ARM/thumb-nop.s @@ -5,5 +5,5 @@ nop -@ CHECK-V6: nop @ encoding: [0xc0,0x46] +@ CHECK-V6: mov r8, r8 @ encoding: [0xc0,0x46] @ CHECK-V7: nop @ encoding: [0x00,0xbf] diff --git a/test/MC/ARM/thumb.s b/test/MC/ARM/thumb.s index 2223bdc..9a72541 100644 --- a/test/MC/ARM/thumb.s +++ b/test/MC/ARM/thumb.s @@ -42,7 +42,7 @@ @ CHECK: bkpt #2 @ encoding: [0x02,0xbe] nop -@ CHECK: nop @ encoding: [0xc0,0x46] +@ CHECK: mov r8, r8 @ encoding: [0xc0,0x46] cpsie aif @ CHECK: cpsie aif @ encoding: [0x67,0xb6] diff --git a/test/MC/Disassembler/ARM/thumb1.txt b/test/MC/Disassembler/ARM/thumb1.txt index de9596a..7362d9b 100644 --- a/test/MC/Disassembler/ARM/thumb1.txt +++ b/test/MC/Disassembler/ARM/thumb1.txt @@ -279,9 +279,11 @@ #------------------------------------------------------------------------------ # CHECK: mov r3, r4 # CHECK: movs r1, r3 +# CHECK: mov r8, r8 0x23 0x46 0x19 0x00 +0xc0 0x46 #------------------------------------------------------------------------------ @@ -310,14 +312,6 @@ #------------------------------------------------------------------------------ -# NOP -#------------------------------------------------------------------------------ -# CHECK: nop - -0xc0 0x46 - - -#------------------------------------------------------------------------------ # ORR #------------------------------------------------------------------------------ # CHECK: orrs r3, r4 |