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author | Jim Grosbach <grosbach@apple.com> | 2013-08-13 21:30:58 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2013-08-13 21:30:58 +0000 |
commit | 51a0280d296405cb1fdb268e5387867e0db2e46e (patch) | |
tree | a353cfd76a552d24b9873dc5b7d2e560a11678f7 /test | |
parent | af9e3557552c341615052a05d4eeb36d7fd5c33f (diff) | |
download | external_llvm-51a0280d296405cb1fdb268e5387867e0db2e46e.zip external_llvm-51a0280d296405cb1fdb268e5387867e0db2e46e.tar.gz external_llvm-51a0280d296405cb1fdb268e5387867e0db2e46e.tar.bz2 |
DAG: Combine (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)
A common idiom is to use zero and all-ones as sentinal values and to
check for both in a single conditional ("x != 0 && x != (unsigned)-1").
That generates code, for i32, like:
testl %edi, %edi
setne %al
cmpl $-1, %edi
setne %cl
andb %al, %cl
With this transform, we generate the simpler:
incl %edi
cmpl $1, %edi
seta %al
Similar improvements for other integer sizes and on other platforms. In
general, combining the two setcc instructions into one is better.
rdar://14689217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188315 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/ARM/setcc-sentinals.ll | 14 | ||||
-rw-r--r-- | test/CodeGen/X86/setcc-sentinals.ll | 13 |
2 files changed, 27 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/setcc-sentinals.ll b/test/CodeGen/ARM/setcc-sentinals.ll new file mode 100644 index 0000000..4033a81 --- /dev/null +++ b/test/CodeGen/ARM/setcc-sentinals.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -mcpu=cortex-a8 -march=arm -asm-verbose=false | FileCheck %s + +define zeroext i1 @test0(i32 %x) nounwind { +; CHECK-LABEL: test0: +; CHECK-NEXT: add [[REG:(r[0-9]+)|(lr)]], r0, #1 +; CHECK-NEXT: mov r0, #0 +; CHECK-NEXT: cmp [[REG]], #1 +; CHECK-NEXT: movhi r0, #1 +; CHECK-NEXT: bx lr + %cmp1 = icmp ne i32 %x, -1 + %not.cmp = icmp ne i32 %x, 0 + %.cmp1 = and i1 %cmp1, %not.cmp + ret i1 %.cmp1 +} diff --git a/test/CodeGen/X86/setcc-sentinals.ll b/test/CodeGen/X86/setcc-sentinals.ll new file mode 100644 index 0000000..cae5f58 --- /dev/null +++ b/test/CodeGen/X86/setcc-sentinals.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -mcpu=generic -march=x86-64 -asm-verbose=false | FileCheck %s + +define zeroext i1 @test0(i64 %x) nounwind { +; CHECK-LABEL: test0: +; CHECK-NEXT: incq %rdi +; CHECK-NEXT: cmpq $1, %rdi +; CHECK-NEXT: seta %al +; CHECK-NEXT: ret + %cmp1 = icmp ne i64 %x, -1 + %not.cmp = icmp ne i64 %x, 0 + %.cmp1 = and i1 %cmp1, %not.cmp + ret i1 %.cmp1 +} |