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authorManman Ren <mren@apple.com>2012-06-25 21:49:38 +0000
committerManman Ren <mren@apple.com>2012-06-25 21:49:38 +0000
commit540cda34b03388b510ded4546acfc7e276700daa (patch)
tree221405a8540bdab11f48fb7e10c50a7ecfa46dc5 /test
parent2c5fbb9bcb5c1355e723be8c588ea0998d3d3720 (diff)
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ARM: update peephole optimization.
More condition codes are included when deciding whether to remove cmp after a sub instruction. Specifically, we extend from GE|LT|GT|LE to GE|LT|GT|LE|HS|LS|HI|LO|EQ|NE. If we have "sub a, b; cmp b, a; movhs", we should be able to replace with "sub a, b; movls". rdar: 11725965 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159166 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/ARM/sub-cmp-peephole.ll12
1 files changed, 12 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/sub-cmp-peephole.ll b/test/CodeGen/ARM/sub-cmp-peephole.ll
index e0970f3..c46c891 100644
--- a/test/CodeGen/ARM/sub-cmp-peephole.ll
+++ b/test/CodeGen/ARM/sub-cmp-peephole.ll
@@ -32,3 +32,15 @@ entry:
%sub. = select i1 %cmp, i32 %sub, i32 %b
ret i32 %sub.
}
+
+; rdar://11725965
+define i32 @i(i32 %a, i32 %b) nounwind readnone ssp {
+entry:
+; CHECK: i:
+; CHECK: subs
+; CHECK-NOT: cmp
+ %cmp = icmp ult i32 %a, %b
+ %sub = sub i32 %b, %a
+ %sub. = select i1 %cmp, i32 %sub, i32 0
+ ret i32 %sub.
+}