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authorEvan Cheng <evan.cheng@apple.com>2008-01-23 23:17:41 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-01-23 23:17:41 +0000
commit5a67b819a91592a2e433c2db36481dd7d6ee7bf6 (patch)
treeef8b23bf5acebabc33fea3c8928a9f83b85ddeae /test
parent7e520b50509cf5f80d294f4ebcc08ae27590a4ee (diff)
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Let each target decide byval alignment. For X86, it's 4-byte unless the aggregare contains SSE vector(s). For x86-64, it's max of 8 or alignment of the type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46286 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/X86/byval4.ll4
-rw-r--r--test/CodeGen/X86/byval5.ll4
-rw-r--r--test/CodeGen/X86/byval6.ll16
-rw-r--r--test/CodeGen/X86/byval7.ll14
4 files changed, 34 insertions, 4 deletions
diff --git a/test/CodeGen/X86/byval4.ll b/test/CodeGen/X86/byval4.ll
index 9ce635b..591749f 100644
--- a/test/CodeGen/X86/byval4.ll
+++ b/test/CodeGen/X86/byval4.ll
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsl | count 2
-; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsw | count 2
+; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsw | count 2
+; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsl | count 2
%struct.s = type { i16, i16, i16, i16, i16, i16 }
diff --git a/test/CodeGen/X86/byval5.ll b/test/CodeGen/X86/byval5.ll
index 95bf3f4..4965d16 100644
--- a/test/CodeGen/X86/byval5.ll
+++ b/test/CodeGen/X86/byval5.ll
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsl | count 2
-; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsb | count 2
+; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsb | count 2
+; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsl | count 2
%struct.s = type { i8, i8, i8, i8, i8, i8 }
diff --git a/test/CodeGen/X86/byval6.ll b/test/CodeGen/X86/byval6.ll
new file mode 100644
index 0000000..47269d2
--- /dev/null
+++ b/test/CodeGen/X86/byval6.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=x86 | grep add | not grep 16
+
+ %struct.W = type { x86_fp80, x86_fp80 }
+@B = global %struct.W { x86_fp80 0xK4001A000000000000000, x86_fp80 0xK4001C000000000000000 }, align 32
+@.cpx = internal constant %struct.W { x86_fp80 0xK4001E000000000000000, x86_fp80 0xK40028000000000000000 }
+
+define i32 @main() nounwind {
+entry:
+ tail call void (i32, ...)* @bar( i32 3, %struct.W* byval @.cpx ) nounwind
+ tail call void (i32, ...)* @baz( i32 3, %struct.W* byval @B ) nounwind
+ ret i32 undef
+}
+
+declare void @bar(i32, ...)
+
+declare void @baz(i32, ...)
diff --git a/test/CodeGen/X86/byval7.ll b/test/CodeGen/X86/byval7.ll
new file mode 100644
index 0000000..54210c8
--- /dev/null
+++ b/test/CodeGen/X86/byval7.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -march=x86 | grep add | grep 16
+
+ %struct.S = type { <2 x i64> }
+
+define i32 @main() nounwind {
+entry:
+ %s = alloca %struct.S ; <%struct.S*> [#uses=2]
+ %tmp15 = getelementptr %struct.S* %s, i32 0, i32 0 ; <<2 x i64>*> [#uses=1]
+ store <2 x i64> < i64 8589934595, i64 1 >, <2 x i64>* %tmp15, align 16
+ call void @t( i32 1, %struct.S* byval %s ) nounwind
+ ret i32 0
+}
+
+declare void @t(i32, %struct.S* byval )