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| author | Michel Danzer <michel.daenzer@amd.com> | 2013-02-21 08:57:10 +0000 |
|---|---|---|
| committer | Michel Danzer <michel.daenzer@amd.com> | 2013-02-21 08:57:10 +0000 |
| commit | 74bf7a8467262ad60c8b13582bd6b07fd30b5550 (patch) | |
| tree | c4bcd32dc027938eaa68bc3e6439817f13a7d646 /test | |
| parent | 197a60a66612ab274a734066962a10126a11fb53 (diff) | |
| download | external_llvm-74bf7a8467262ad60c8b13582bd6b07fd30b5550.zip external_llvm-74bf7a8467262ad60c8b13582bd6b07fd30b5550.tar.gz external_llvm-74bf7a8467262ad60c8b13582bd6b07fd30b5550.tar.bz2 | |
R600/SI: Make sure M0 is loaded for V_INTERP_MOV_F32
NOTE: This is a candidate for the Mesa stable branch.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175733 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/R600/llvm.SI.fs.interp.constant.ll | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll b/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll new file mode 100644 index 0000000..0c19f14 --- /dev/null +++ b/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll @@ -0,0 +1,23 @@ +;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s + +;CHECK: S_MOV_B32 +;CHECK-NEXT: V_INTERP_MOV_F32 + +define void @main() { +main_body: + call void @llvm.AMDGPU.shader.type(i32 0) + %0 = load i32 addrspace(8)* inttoptr (i32 6 to i32 addrspace(8)*) + %1 = call float @llvm.SI.fs.interp.constant(i32 0, i32 0, i32 %0) + %2 = call i32 @llvm.SI.packf16(float %1, float %1) + %3 = bitcast i32 %2 to float + call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %3, float %3, float %3, float %3) + ret void +} + +declare void @llvm.AMDGPU.shader.type(i32) + +declare float @llvm.SI.fs.interp.constant(i32, i32, i32) readonly + +declare i32 @llvm.SI.packf16(float, float) readnone + +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) |