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authorHal Finkel <hfinkel@anl.gov>2012-06-04 02:21:00 +0000
committerHal Finkel <hfinkel@anl.gov>2012-06-04 02:21:00 +0000
commit77838f9ca974bda956f4a93c20bb4307cf0c470f (patch)
tree7132aa088bcd3babe7a63ffaab39ee5d48fabc78 /test
parent761cb0675676f894afa675148bd4e86dcfabd27f (diff)
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Enable generating PPC pre-increment (r+imm) instructions by default.
It seems that this no longer causes test suite failures on PPC64 (after r157159), and often gives a performance benefit, so it can be enabled by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157911 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/PowerPC/mem_update.ll4
-rw-r--r--test/CodeGen/PowerPC/stwu8.ll2
2 files changed, 3 insertions, 3 deletions
diff --git a/test/CodeGen/PowerPC/mem_update.ll b/test/CodeGen/PowerPC/mem_update.ll
index 17e7e28..39af11a 100644
--- a/test/CodeGen/PowerPC/mem_update.ll
+++ b/test/CodeGen/PowerPC/mem_update.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=ppc32 -enable-ppc-preinc | \
+; RUN: llc < %s -march=ppc32 | \
; RUN: not grep addi
-; RUN: llc < %s -march=ppc64 -enable-ppc-preinc | \
+; RUN: llc < %s -march=ppc64 | \
; RUN: not grep addi
@Glob = global i64 4
diff --git a/test/CodeGen/PowerPC/stwu8.ll b/test/CodeGen/PowerPC/stwu8.ll
index fabf763..897bfc6 100644
--- a/test/CodeGen/PowerPC/stwu8.ll
+++ b/test/CodeGen/PowerPC/stwu8.ll
@@ -1,4 +1,4 @@
-; RUN: llc -enable-ppc-preinc < %s | FileCheck %s
+; RUN: llc < %s | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"