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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-06-14 05:11:46 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-06-14 05:11:46 +0000 |
| commit | 79abd1c27cf3436b94dc15adedf2e33167f96a8e (patch) | |
| tree | 81aada3cc62f304a1f5960ef207ba3378ad1aab6 /test | |
| parent | 9a767330f555f21d6ef311d3a348d3a44f306d35 (diff) | |
| download | external_llvm-79abd1c27cf3436b94dc15adedf2e33167f96a8e.zip external_llvm-79abd1c27cf3436b94dc15adedf2e33167f96a8e.tar.gz external_llvm-79abd1c27cf3436b94dc15adedf2e33167f96a8e.tar.bz2 | |
Since ARM's prefetch implementation predicted the presence of a instruction
cache prefetch and now that the info from "prefetch" to "ARMPreload" is present,
only add a testcase for PLI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132978 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/ARM/prefetch.ll | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/prefetch.ll b/test/CodeGen/ARM/prefetch.ll index 03a6947..250a34e 100644 --- a/test/CodeGen/ARM/prefetch.ll +++ b/test/CodeGen/ARM/prefetch.ll @@ -64,3 +64,14 @@ entry: } declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind + +define void @t5(i8* %ptr) nounwind { +entry: +; ARM: t5: +; ARM: pli [r0] + +; THUMB2: t5: +; THUMB2: pli [r0] + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 0 ) + ret void +} |