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author | Dan Gohman <gohman@apple.com> | 2008-07-29 01:02:18 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-07-29 01:02:18 +0000 |
commit | 7ba145b0b4aefe6cae7788070a936cb9fc0aee14 (patch) | |
tree | 7ec1a6f6b2a8a37e054b84505502b3346c6680c7 /test | |
parent | b1e8cad61e64dd7f56b0c62b53f9c1fc86d599f7 (diff) | |
download | external_llvm-7ba145b0b4aefe6cae7788070a936cb9fc0aee14.zip external_llvm-7ba145b0b4aefe6cae7788070a936cb9fc0aee14.tar.gz external_llvm-7ba145b0b4aefe6cae7788070a936cb9fc0aee14.tar.bz2 |
Revert 54147.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54148 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/X86/zext-inreg-0.ll | 62 | ||||
-rw-r--r-- | test/CodeGen/X86/zext-inreg-1.ll | 18 |
2 files changed, 0 insertions, 80 deletions
diff --git a/test/CodeGen/X86/zext-inreg-0.ll b/test/CodeGen/X86/zext-inreg-0.ll deleted file mode 100644 index a4ffd67..0000000 --- a/test/CodeGen/X86/zext-inreg-0.ll +++ /dev/null @@ -1,62 +0,0 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep and -; RUN: llvm-as < %s | llc -march=x86-64 | not grep and - -; These should use movzbl instead of 'and 255'. -; This related to not having a ZERO_EXTEND_REG opcode. - -define i32 @a(i32 %d) nounwind { - %e = add i32 %d, 1 - %retval = and i32 %e, 255 - ret i32 %retval -} -define i32 @b(float %d) nounwind { - %tmp12 = fptoui float %d to i8 - %retval = zext i8 %tmp12 to i32 - ret i32 %retval -} -define i32 @c(i32 %d) nounwind { - %e = add i32 %d, 1 - %retval = and i32 %e, 65535 - ret i32 %retval -} -define i64 @d(i64 %d) nounwind { - %e = add i64 %d, 1 - %retval = and i64 %e, 255 - ret i64 %retval -} -define i64 @e(i64 %d) nounwind { - %e = add i64 %d, 1 - %retval = and i64 %e, 65535 - ret i64 %retval -} -define i64 @f(i64 %d) nounwind { - %e = add i64 %d, 1 - %retval = and i64 %e, 4294967295 - ret i64 %retval -} - -define i32 @g(i8 %d) nounwind { - %e = add i8 %d, 1 - %retval = zext i8 %e to i32 - ret i32 %retval -} -define i32 @h(i16 %d) nounwind { - %e = add i16 %d, 1 - %retval = zext i16 %e to i32 - ret i32 %retval -} -define i64 @i(i8 %d) nounwind { - %e = add i8 %d, 1 - %retval = zext i8 %e to i64 - ret i64 %retval -} -define i64 @j(i16 %d) nounwind { - %e = add i16 %d, 1 - %retval = zext i16 %e to i64 - ret i64 %retval -} -define i64 @k(i32 %d) nounwind { - %e = add i32 %d, 1 - %retval = zext i32 %e to i64 - ret i64 %retval -} diff --git a/test/CodeGen/X86/zext-inreg-1.ll b/test/CodeGen/X86/zext-inreg-1.ll deleted file mode 100644 index 4a80fe5..0000000 --- a/test/CodeGen/X86/zext-inreg-1.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep and - -; These tests differ from the ones in zext-inreg-0.ll in that -; on x86-64 they do require and instructions. - -; These should use movzbl instead of 'and 255'. -; This related to not having ZERO_EXTEND_REG node. - -define i64 @g(i64 %d) nounwind { - %e = add i64 %d, 1 - %retval = and i64 %e, 1099511627775 - ret i64 %retval -} -define i64 @h(i64 %d) nounwind { - %e = add i64 %d, 1 - %retval = and i64 %e, 281474976710655 - ret i64 %retval -} |