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| author | Bill Wendling <isanbard@gmail.com> | 2010-03-03 00:35:56 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2010-03-03 00:35:56 +0000 |
| commit | 7d9f2b93a356aa89186522bd61c5c565718ff555 (patch) | |
| tree | 23c53369693ff5b3457349e0240ee4753c504bc6 /test | |
| parent | a43398283dcb34568d2283dafbdfe0fa66b05033 (diff) | |
| download | external_llvm-7d9f2b93a356aa89186522bd61c5c565718ff555.zip external_llvm-7d9f2b93a356aa89186522bd61c5c565718ff555.tar.gz external_llvm-7d9f2b93a356aa89186522bd61c5c565718ff555.tar.bz2 | |
This test case:
long test(long x) { return (x & 123124) | 3; }
Currently compiles to:
_test:
orl $3, %edi
movq %rdi, %rax
andq $123127, %rax
ret
This is because instruction and DAG combiners canonicalize
(or (and x, C), D) -> (and (or, D), (C | D))
However, this is only profitable if (C & D) != 0. It gets in the way of the
3-addressification because the input bits are known to be zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97616 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/and-or-fold.ll | 28 | ||||
| -rw-r--r-- | test/Transforms/InstCombine/xor2.ll | 8 |
2 files changed, 24 insertions, 12 deletions
diff --git a/test/CodeGen/X86/and-or-fold.ll b/test/CodeGen/X86/and-or-fold.ll index 7733b8a..836b5f1 100644 --- a/test/CodeGen/X86/and-or-fold.ll +++ b/test/CodeGen/X86/and-or-fold.ll @@ -1,14 +1,26 @@ -; RUN: llc < %s -march=x86 | grep and | count 1 +; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck -check-prefix=DARWIN %s +; RUN: opt < %s -O2 | llc -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN-OPT %s ; The dag combiner should fold together (x&127)|(y&16711680) -> (x|y)&c1 ; in this case. -define i32 @test6(i32 %x, i16 %y) { - %tmp1 = zext i16 %y to i32 ; <i32> [#uses=1] - %tmp2 = and i32 %tmp1, 127 ; <i32> [#uses=1] - %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1] - %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1] - %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1] - ret i32 %tmp6 +define i32 @test1(i32 %x, i16 %y) { + %tmp1 = zext i16 %y to i32 + %tmp2 = and i32 %tmp1, 127 + %tmp4 = shl i32 %x, 16 + %tmp5 = and i32 %tmp4, 16711680 + %tmp6 = or i32 %tmp2, %tmp5 + ret i32 %tmp6 +; DARWIN: andl $16711807, %eax } +; <rdar://problem/7529774> The optimizer shouldn't fold this into (and (or, C), D) +; if (C & D) == 0 +define i64 @test2(i64 %x) nounwind readnone ssp { +entry: + %tmp1 = and i64 %x, 123127 + %tmp2 = or i64 %tmp1, 3 + ret i64 %tmp2 +; DARWIN-OPT: andq $123124 +; DARWIN-OPT-NEXT: leaq 3 +} diff --git a/test/Transforms/InstCombine/xor2.ll b/test/Transforms/InstCombine/xor2.ll index de3d65d..67f05ef 100644 --- a/test/Transforms/InstCombine/xor2.ll +++ b/test/Transforms/InstCombine/xor2.ll @@ -22,8 +22,8 @@ define i1 @test1(i32 %A) { ; PR1014 define i32 @test2(i32 %tmp1) { ; CHECK: @test2 -; CHECK-NEXT: or i32 %tmp1, 8 -; CHECK-NEXT: and i32 +; CHECK-NEXT: and i32 %tmp1, 32 +; CHECK-NEXT: or i32 %ovm, 8 ; CHECK-NEXT: ret i32 %ovm = and i32 %tmp1, 32 %ov3 = add i32 %ovm, 145 @@ -33,8 +33,8 @@ define i32 @test2(i32 %tmp1) { define i32 @test3(i32 %tmp1) { ; CHECK: @test3 -; CHECK-NEXT: or i32 %tmp1, 8 -; CHECK-NEXT: and i32 +; CHECK-NEXT: and i32 %tmp1, 32 +; CHECK-NEXT: or i32 %tmp, 8 ; CHECK-NEXT: ret i32 %ovm = or i32 %tmp1, 145 %ov31 = and i32 %ovm, 177 |