diff options
author | Evan Cheng <evan.cheng@apple.com> | 2008-05-08 00:57:18 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2008-05-08 00:57:18 +0000 |
commit | 7e2ff77ef05c23db6b9c82bc7a4110e170d7f94c (patch) | |
tree | 64720b94bfac0d0b7c77ad7005c71036d40b1d6b /test | |
parent | 687bcb2be07f675914e3a452fcc624bed8f53351 (diff) | |
download | external_llvm-7e2ff77ef05c23db6b9c82bc7a4110e170d7f94c.zip external_llvm-7e2ff77ef05c23db6b9c82bc7a4110e170d7f94c.tar.gz external_llvm-7e2ff77ef05c23db6b9c82bc7a4110e170d7f94c.tar.bz2 |
Handle vector move / load which zero the destination register top bits (i.e. movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50838 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/X86/vec_set-5.ll | 3 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_set-6.ll | 3 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_set-C.ll | 7 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_set-D.ll | 7 |
4 files changed, 17 insertions, 3 deletions
diff --git a/test/CodeGen/X86/vec_set-5.ll b/test/CodeGen/X86/vec_set-5.ll index 687d6af..4fc652c 100644 --- a/test/CodeGen/X86/vec_set-5.ll +++ b/test/CodeGen/X86/vec_set-5.ll @@ -1,8 +1,7 @@ ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f ; RUN: grep movlhps %t | count 1 -; RUN: grep unpcklps %t | count 1 -; RUN: grep punpckldq %t | count 1 ; RUN: grep movq %t | count 1 +; RUN: grep movsd %t | count 1 define <4 x float> @test1(float %a, float %b) nounwind { %tmp = insertelement <4 x float> zeroinitializer, float %a, i32 0 ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/X86/vec_set-6.ll b/test/CodeGen/X86/vec_set-6.ll index 1eeedf1..02df526 100644 --- a/test/CodeGen/X86/vec_set-6.ll +++ b/test/CodeGen/X86/vec_set-6.ll @@ -1,5 +1,6 @@ ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f -; RUN: grep unpcklps %t | count 1 +; RUN: grep movss %t | count 1 +; RUN: grep movups %t | count 1 ; RUN: grep shufps %t | count 1 define <4 x float> @test(float %a, float %b, float %c) nounwind { diff --git a/test/CodeGen/X86/vec_set-C.ll b/test/CodeGen/X86/vec_set-C.ll new file mode 100644 index 0000000..eef9a61 --- /dev/null +++ b/test/CodeGen/X86/vec_set-C.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep movd + +define <2 x i64> @t1(i64 %x) nounwind { + %tmp8 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0 + ret <2 x i64> %tmp8 +} diff --git a/test/CodeGen/X86/vec_set-D.ll b/test/CodeGen/X86/vec_set-D.ll new file mode 100644 index 0000000..71bdd84 --- /dev/null +++ b/test/CodeGen/X86/vec_set-D.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq + +define <4 x i32> @t(i32 %x, i32 %y) nounwind { + %tmp1 = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0 + %tmp2 = insertelement <4 x i32> %tmp1, i32 %y, i32 1 + ret <4 x i32> %tmp2 +} |