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| author | Nadav Rotem <nadav.rotem@intel.com> | 2012-02-03 13:18:25 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2012-02-03 13:18:25 +0000 |
| commit | 7e413e9c94294f17daa64ac9fda09a738e20caa5 (patch) | |
| tree | 12f308bb55bb90e39616f35c56c49dda0597f793 /test | |
| parent | a02556679e685280bd59e0197d9e4aa51d40480c (diff) | |
| download | external_llvm-7e413e9c94294f17daa64ac9fda09a738e20caa5.zip external_llvm-7e413e9c94294f17daa64ac9fda09a738e20caa5.tar.gz external_llvm-7e413e9c94294f17daa64ac9fda09a738e20caa5.tar.bz2 | |
The type-legalizer often scalarizes code. One of the common patterns is extract-and-truncate.
In this patch we optimize this pattern and convert the sequence into extract op of a narrow type.
This allows the BUILD_VECTOR dag optimizations to construct efficient shuffle operations in many cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149692 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/2011-12-8-bitcastintprom.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/avx-shuffle.ll | 8 |
2 files changed, 9 insertions, 1 deletions
diff --git a/test/CodeGen/X86/2011-12-8-bitcastintprom.ll b/test/CodeGen/X86/2011-12-8-bitcastintprom.ll index ceee8e6..e2b3ebc 100644 --- a/test/CodeGen/X86/2011-12-8-bitcastintprom.ll +++ b/test/CodeGen/X86/2011-12-8-bitcastintprom.ll @@ -2,8 +2,8 @@ ; Make sure that the conversion between v4i8 to v2i16 is not a simple bitcast. ; CHECK: prom_bug -; CHECK: movd ; CHECK: shufb +; CHECK: movd ; CHECK: movw ; CHECK: ret define void @prom_bug(<4 x i8> %t, i16* %p) { diff --git a/test/CodeGen/X86/avx-shuffle.ll b/test/CodeGen/X86/avx-shuffle.ll index 08b668c..5a5c353 100644 --- a/test/CodeGen/X86/avx-shuffle.ll +++ b/test/CodeGen/X86/avx-shuffle.ll @@ -109,3 +109,11 @@ define <4 x float> @test12(<4 x float>* %a) nounwind { %tmp1 = shufflevector <4 x float> %tmp0, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0> ret <4 x float> %tmp1 } + +;CHECK: test13 +;CHECK: shufd +;CHECK: ret +define <4 x i32> @test13(<2 x i32>%x) nounwind readnone { + %x1 = shufflevector <2 x i32> %x, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> + ret <4 x i32>%x1 +} |