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author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2013-06-03 00:21:54 +0000 |
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committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2013-06-03 00:21:54 +0000 |
commit | 85cc972a06690507a2660fccb198319b0402105f (patch) | |
tree | 7ec54d8c20fb29845b06316d0a626ef59e11ee0b /test | |
parent | 65ca7aa57d5e9b391f02a5686e7622deaac146f9 (diff) | |
download | external_llvm-85cc972a06690507a2660fccb198319b0402105f.zip external_llvm-85cc972a06690507a2660fccb198319b0402105f.tar.gz external_llvm-85cc972a06690507a2660fccb198319b0402105f.tar.bz2 |
Sparc: When storing 0, use %g0 directly in the store instruction instead of
using two instructions (sethi and store).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183090 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/SPARC/64bit.ll | 15 | ||||
-rw-r--r-- | test/CodeGen/SPARC/basictest.ll | 12 |
2 files changed, 27 insertions, 0 deletions
diff --git a/test/CodeGen/SPARC/64bit.ll b/test/CodeGen/SPARC/64bit.ll index f881ddf..4eb2553 100644 --- a/test/CodeGen/SPARC/64bit.ll +++ b/test/CodeGen/SPARC/64bit.ll @@ -262,3 +262,18 @@ define double @bitcast_f64_i64(i64 %x) { %y = bitcast i64 %x to double ret double %y } + +; CHECK: store_zero: +; CHECK: stx %g0, [%i0] +; CHECK: stx %g0, [%i1+8] + +; OPT: store_zero: +; OPT: stx %g0, [%o0] +; OPT: stx %g0, [%o1+8] +define i64 @store_zero(i64* nocapture %a, i64* nocapture %b) { +entry: + store i64 0, i64* %a, align 8 + %0 = getelementptr inbounds i64* %b, i32 1 + store i64 0, i64* %0, align 8 + ret i64 0 +} diff --git a/test/CodeGen/SPARC/basictest.ll b/test/CodeGen/SPARC/basictest.ll index e67b39c..ce60653 100644 --- a/test/CodeGen/SPARC/basictest.ll +++ b/test/CodeGen/SPARC/basictest.ll @@ -24,3 +24,15 @@ define i32 @test2(i32 %X, i32 %Y) { ; CHECK: test2: ; CHECK: xnor %o0, %o1, %o0 } + +; CHECK: store_zero: +; CHECK: st %g0, [%o0] +; CHECK: st %g0, [%o1+4] +define i32 @store_zero(i32* %a, i32* %b) { +entry: + store i32 0, i32* %a, align 4 + %0 = getelementptr inbounds i32* %b, i32 1 + store i32 0, i32* %0, align 4 + ret i32 0 +} + |