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| author | Hal Finkel <hfinkel@anl.gov> | 2012-08-04 14:10:46 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-08-04 14:10:46 +0000 |
| commit | 8cc3474f72388836fa4ca7d3622289fb9ee08b41 (patch) | |
| tree | ff2efb5d8b676af7332ad5a3df07759354943f3f /test | |
| parent | ad62e92279bc0b14c54db94dd794082c8b8edd9e (diff) | |
| download | external_llvm-8cc3474f72388836fa4ca7d3622289fb9ee08b41.zip external_llvm-8cc3474f72388836fa4ca7d3622289fb9ee08b41.tar.gz external_llvm-8cc3474f72388836fa4ca7d3622289fb9ee08b41.tar.bz2 | |
Add readcyclecounter lowering on PPC64.
On PPC64, this can be done with a simple TableGen pattern.
To enable this, I've added the (otherwise missing) readcyclecounter
SDNode definition to TargetSelectionDAG.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161302 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/PowerPC/ppc64-cyclecounter.ll | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/ppc64-cyclecounter.ll b/test/CodeGen/PowerPC/ppc64-cyclecounter.ll new file mode 100644 index 0000000..c1df3c7 --- /dev/null +++ b/test/CodeGen/PowerPC/ppc64-cyclecounter.ll @@ -0,0 +1,15 @@ +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" +; RUN: llc < %s | FileCheck %s + +define i64 @test1() nounwind { +entry: + %r = call i64 @llvm.readcyclecounter() + ret i64 %r +} + +; CHECK: @test1 +; CHECK: mftb + +declare i64 @llvm.readcyclecounter() + |