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author | Evan Cheng <evan.cheng@apple.com> | 2012-07-16 19:35:43 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2012-07-16 19:35:43 +0000 |
commit | 98819c9d1e3b929e9ebab0e8cd3edb31aad21bd8 (patch) | |
tree | 382bd7339c243a3f753335d08a9d040a054aab37 /test | |
parent | c76fa8937d483ae83f94d0793254dbab78877687 (diff) | |
download | external_llvm-98819c9d1e3b929e9ebab0e8cd3edb31aad21bd8.zip external_llvm-98819c9d1e3b929e9ebab0e8cd3edb31aad21bd8.tar.gz external_llvm-98819c9d1e3b929e9ebab0e8cd3edb31aad21bd8.tar.bz2 |
For something like
uint32_t hi(uint64_t res)
{
uint_32t hi = res >> 32;
return !hi;
}
llvm IR looks like this:
define i32 @hi(i64 %res) nounwind uwtable ssp {
entry:
%lnot = icmp ult i64 %res, 4294967296
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
}
The optimizer has optimize away the right shift and truncate but the resulting
constant is too large to fit in the 32-bit immediate field. The resulting x86
code is worse as a result:
movabsq $4294967296, %rax ## imm = 0x100000000
cmpq %rax, %rdi
sbbl %eax, %eax
andl $1, %eax
This patch teaches the x86 lowering code to handle ult against a large immediate
with trailing zeros. It will issue a right shift and a truncate followed by
a comparison against a shifted immediate.
shrq $32, %rdi
testl %edi, %edi
sete %al
movzbl %al, %eax
It also handles a ugt comparison against a large immediate with trailing bits
set. i.e. X > 0x0ffffffff -> (X >> 32) >= 1
rdar://11866926
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160312 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/X86/cmp.ll | 48 |
2 files changed, 50 insertions, 2 deletions
diff --git a/test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll b/test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll index c6f4b49..be10ad5 100644 --- a/test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll +++ b/test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll @@ -12,9 +12,9 @@ declare hidden fastcc void @_ZN3JSCL23returnToThrowTrampolineEPNS_12JSGlobalData ; Avoid hoisting the test above loads or copies ; CHECK: %entry -; CHECK: cmpq +; CHECK: test ; CHECK-NOT: mov -; CHECK: jb +; CHECK: je define i32 @cti_op_eq(i8** nocapture %args) nounwind ssp { entry: %0 = load i8** null, align 8 diff --git a/test/CodeGen/X86/cmp.ll b/test/CodeGen/X86/cmp.ll index ef5e353..c9c85ab 100644 --- a/test/CodeGen/X86/cmp.ll +++ b/test/CodeGen/X86/cmp.ll @@ -90,3 +90,51 @@ F: ; CHECK: encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00] } +; rdar://11866926 +define i32 @test7(i64 %res) nounwind uwtable readnone ssp { +entry: +; CHECK: test7: +; CHECK-NOT: movabsq +; CHECK: shrq $32, %rdi +; CHECK: testl %edi, %edi +; CHECK: sete + %lnot = icmp ult i64 %res, 4294967296 + %lnot.ext = zext i1 %lnot to i32 + ret i32 %lnot.ext +} + +define i32 @test8(i64 %res) nounwind uwtable readnone ssp { +entry: +; CHECK: test8: +; CHECK-NOT: movabsq +; CHECK: shrq $32, %rdi +; CHECK: cmpl $3, %edi + %lnot = icmp ult i64 %res, 12884901888 + %lnot.ext = zext i1 %lnot to i32 + ret i32 %lnot.ext +} + +define i32 @test9(i64 %res) nounwind uwtable readnone ssp { +entry: +; CHECK: test9: +; CHECK-NOT: movabsq +; CHECK: shrq $33, %rdi +; CHECK: testl %edi, %edi +; CHECK: sete + %lnot = icmp ult i64 %res, 8589934592 + %lnot.ext = zext i1 %lnot to i32 + ret i32 %lnot.ext +} + +define i32 @test10(i64 %res) nounwind uwtable readnone ssp { +entry: +; CHECK: test10: +; CHECK-NOT: movabsq +; CHECK: shrq $32, %rdi +; CHECK: cmpl $1, %edi +; CHECK: setae + %lnot = icmp uge i64 %res, 4294967296 + %lnot.ext = zext i1 %lnot to i32 + ret i32 %lnot.ext +} + |