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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2012-07-01 17:08:01 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2012-07-01 17:08:01 +0000 |
| commit | 9c3d5a70f40f9e7bb90f3cb8ec1d87cff6e3f0ae (patch) | |
| tree | 88824de000b5e42fd0e3cc787c771d415888da49 /test | |
| parent | 8f40f7b8676ae7931baaecb1046a21f09471384b (diff) | |
| download | external_llvm-9c3d5a70f40f9e7bb90f3cb8ec1d87cff6e3f0ae.zip external_llvm-9c3d5a70f40f9e7bb90f3cb8ec1d87cff6e3f0ae.tar.gz external_llvm-9c3d5a70f40f9e7bb90f3cb8ec1d87cff6e3f0ae.tar.bz2 | |
Now that RegistersDefinedFromSameValue handles one instruction being an
implicit_def, the other instruction can be anything, including instructions
that define multiple values. Be careful about that and don't assume what operand
0 is.
Fixes pr13249.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159509 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/ARM/pr13249.ll | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/pr13249.ll b/test/CodeGen/ARM/pr13249.ll new file mode 100644 index 0000000..4bc8810 --- /dev/null +++ b/test/CodeGen/ARM/pr13249.ll @@ -0,0 +1,27 @@ +; RUN: llc < %s -mtriple armv7--linux-gnueabi + +define arm_aapcscc i8* @__strtok_r_1c(i8* %arg, i8 signext %arg1, i8** nocapture %arg2) nounwind { +bb: + br label %bb3 + +bb3: ; preds = %bb3, %bb + %tmp = phi i8* [ %tmp5, %bb3 ], [ %arg, %bb ] + %tmp4 = load i8* %tmp, align 1 + %tmp5 = getelementptr inbounds i8* %tmp, i32 1 + br i1 undef, label %bb3, label %bb7 + +bb7: ; preds = %bb13, %bb3 + %tmp8 = phi i8 [ %tmp14, %bb13 ], [ %tmp4, %bb3 ] + %tmp9 = phi i8* [ %tmp12, %bb13 ], [ %tmp, %bb3 ] + %tmp10 = icmp ne i8 %tmp8, %arg1 + %tmp12 = getelementptr inbounds i8* %tmp9, i32 1 + br i1 %tmp10, label %bb13, label %bb15 + +bb13: ; preds = %bb7 + %tmp14 = load i8* %tmp12, align 1 + br label %bb7 + +bb15: ; preds = %bb7 + store i8* %tmp9, i8** %arg2, align 4 + ret i8* %tmp +} |