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| author | Amaury de la Vieuville <amaury.dlv@gmail.com> | 2013-06-08 13:54:05 +0000 |
|---|---|---|
| committer | Amaury de la Vieuville <amaury.dlv@gmail.com> | 2013-06-08 13:54:05 +0000 |
| commit | 9eefea009fb559cf441254f7022a2824386852c6 (patch) | |
| tree | e4b68b37bc4ee68f2719b7550b71f87f4597be81 /test | |
| parent | ae50ddb2aeaec7dd91ef8db3918688c104a6baed (diff) | |
| download | external_llvm-9eefea009fb559cf441254f7022a2824386852c6.zip external_llvm-9eefea009fb559cf441254f7022a2824386852c6.tar.gz external_llvm-9eefea009fb559cf441254f7022a2824386852c6.tar.bz2 | |
ARM: fix VMOVvnf32 decoding when ambiguous with VCVT
Enforce Table A7-15 (op=1, cmode=0b111) -> UNDEF
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183612 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/Disassembler/ARM/invalid-VMOV-arm.txt | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/test/MC/Disassembler/ARM/invalid-VMOV-arm.txt b/test/MC/Disassembler/ARM/invalid-VMOV-arm.txt new file mode 100644 index 0000000..9d6cd5c --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-VMOV-arm.txt @@ -0,0 +1,7 @@ +# VMOV cmode=0b1111 op=1 +# RUN: echo "0x70 0xef 0xc7 0xf3" | llvm-mc -triple=armv7 -disassemble 2>&1 | FileCheck %s + +# VMOV cmode=0b1111 op=1 +# RUN: echo "0x30 0x0f 0x80 0xf3" | llvm-mc -triple=armv7 -disassemble 2>&1 | FileCheck %s + +# CHECK: invalid instruction encoding |