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| author | Tilmann Scheller <tilmann.scheller@googlemail.com> | 2013-06-28 15:09:46 +0000 |
|---|---|---|
| committer | Tilmann Scheller <tilmann.scheller@googlemail.com> | 2013-06-28 15:09:46 +0000 |
| commit | a744d41a3f8af25938e12617abe2a8d32f6eabf6 (patch) | |
| tree | 094f49759f729449d3b49a1afa00a5e88af337e3 /test | |
| parent | 0ed872cdd1e5d7d60983854ea49aff13aa3280c1 (diff) | |
| download | external_llvm-a744d41a3f8af25938e12617abe2a8d32f6eabf6.zip external_llvm-a744d41a3f8af25938e12617abe2a8d32f6eabf6.tar.gz external_llvm-a744d41a3f8af25938e12617abe2a8d32f6eabf6.tar.bz2 | |
ARM: Fix pseudo-instructions for SRS (Store Return State).
The mapping between SRS pseudo-instructions and SRS native instructions was incorrect, the correct mapping is:
srsfa -> srsib
srsea -> srsia
srsfd -> srsdb
srsed -> srsda
This fixes <rdar://problem/14214734>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185155 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/ARM/basic-arm-instructions.s | 28 | ||||
| -rw-r--r-- | test/MC/ARM/basic-thumb2-instructions.s | 12 |
2 files changed, 20 insertions, 20 deletions
diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index aaff80c..3548305 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -2125,15 +2125,15 @@ Lforward: @ CHECK: srsia sp!, #2 @ encoding: [0x02,0x05,0xed,0xf8] @ CHECK: srsib sp!, #14 @ encoding: [0x0e,0x05,0xed,0xf9] -@ CHECK: srsda sp, #11 @ encoding: [0x0b,0x05,0x4d,0xf8] -@ CHECK: srsdb sp, #10 @ encoding: [0x0a,0x05,0x4d,0xf9] -@ CHECK: srsia sp, #9 @ encoding: [0x09,0x05,0xcd,0xf8] -@ CHECK: srsib sp, #5 @ encoding: [0x05,0x05,0xcd,0xf9] +@ CHECK: srsib sp, #11 @ encoding: [0x0b,0x05,0xcd,0xf9] +@ CHECK: srsia sp, #10 @ encoding: [0x0a,0x05,0xcd,0xf8] +@ CHECK: srsdb sp, #9 @ encoding: [0x09,0x05,0x4d,0xf9] +@ CHECK: srsda sp, #5 @ encoding: [0x05,0x05,0x4d,0xf8] -@ CHECK: srsda sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf8] -@ CHECK: srsdb sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf9] -@ CHECK: srsia sp!, #5 @ encoding: [0x05,0x05,0xed,0xf8] @ CHECK: srsib sp!, #5 @ encoding: [0x05,0x05,0xed,0xf9] +@ CHECK: srsia sp!, #5 @ encoding: [0x05,0x05,0xed,0xf8] +@ CHECK: srsdb sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf9] +@ CHECK: srsda sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf8] @ CHECK: srsia sp, #5 @ encoding: [0x05,0x05,0xcd,0xf8] @ CHECK: srsia sp!, #5 @ encoding: [0x05,0x05,0xed,0xf8] @@ -2170,14 +2170,14 @@ Lforward: @ CHECK: srsdb sp!, #19 @ encoding: [0x13,0x05,0x6d,0xf9] @ CHECK: srsia sp!, #2 @ encoding: [0x02,0x05,0xed,0xf8] @ CHECK: srsib sp!, #14 @ encoding: [0x0e,0x05,0xed,0xf9] -@ CHECK: srsda sp, #11 @ encoding: [0x0b,0x05,0x4d,0xf8] -@ CHECK: srsdb sp, #10 @ encoding: [0x0a,0x05,0x4d,0xf9] -@ CHECK: srsia sp, #9 @ encoding: [0x09,0x05,0xcd,0xf8] -@ CHECK: srsib sp, #5 @ encoding: [0x05,0x05,0xcd,0xf9] -@ CHECK: srsda sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf8] -@ CHECK: srsdb sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf9] -@ CHECK: srsia sp!, #5 @ encoding: [0x05,0x05,0xed,0xf8] +@ CHECK: srsib sp, #11 @ encoding: [0x0b,0x05,0xcd,0xf9] +@ CHECK: srsia sp, #10 @ encoding: [0x0a,0x05,0xcd,0xf8] +@ CHECK: srsdb sp, #9 @ encoding: [0x09,0x05,0x4d,0xf9] +@ CHECK: srsda sp, #5 @ encoding: [0x05,0x05,0x4d,0xf8] @ CHECK: srsib sp!, #5 @ encoding: [0x05,0x05,0xed,0xf9] +@ CHECK: srsia sp!, #5 @ encoding: [0x05,0x05,0xed,0xf8] +@ CHECK: srsdb sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf9] +@ CHECK: srsda sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf8] @ CHECK: srsia sp, #5 @ encoding: [0x05,0x05,0xcd,0xf8] @ CHECK: srsia sp!, #5 @ encoding: [0x05,0x05,0xed,0xf8] diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 9eb9244..6183992 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -2349,10 +2349,10 @@ _func: @ CHECK: srsia sp, #0 @ encoding: [0x8d,0xe9,0x00,0xc0] @ CHECK: srsdb sp!, #19 @ encoding: [0x2d,0xe8,0x13,0xc0] @ CHECK: srsia sp!, #2 @ encoding: [0xad,0xe9,0x02,0xc0] -@ CHECK: srsdb sp, #10 @ encoding: [0x0d,0xe8,0x0a,0xc0] -@ CHECK: srsia sp, #9 @ encoding: [0x8d,0xe9,0x09,0xc0] -@ CHECK: srsdb sp!, #5 @ encoding: [0x2d,0xe8,0x05,0xc0] +@ CHECK: srsia sp, #10 @ encoding: [0x8d,0xe9,0x0a,0xc0] +@ CHECK: srsdb sp, #9 @ encoding: [0x0d,0xe8,0x09,0xc0] @ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0] +@ CHECK: srsdb sp!, #5 @ encoding: [0x2d,0xe8,0x05,0xc0] @ CHECK: srsia sp, #5 @ encoding: [0x8d,0xe9,0x05,0xc0] @ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0] @@ -2375,10 +2375,10 @@ _func: @ CHECK: srsia sp, #0 @ encoding: [0x8d,0xe9,0x00,0xc0] @ CHECK: srsdb sp!, #19 @ encoding: [0x2d,0xe8,0x13,0xc0] @ CHECK: srsia sp!, #2 @ encoding: [0xad,0xe9,0x02,0xc0] -@ CHECK: srsdb sp, #10 @ encoding: [0x0d,0xe8,0x0a,0xc0] -@ CHECK: srsia sp, #9 @ encoding: [0x8d,0xe9,0x09,0xc0] -@ CHECK: srsdb sp!, #5 @ encoding: [0x2d,0xe8,0x05,0xc0] +@ CHECK: srsia sp, #10 @ encoding: [0x8d,0xe9,0x0a,0xc0] +@ CHECK: srsdb sp, #9 @ encoding: [0x0d,0xe8,0x09,0xc0] @ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0] +@ CHECK: srsdb sp!, #5 @ encoding: [0x2d,0xe8,0x05,0xc0] @ CHECK: srsia sp, #5 @ encoding: [0x8d,0xe9,0x05,0xc0] @ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0] |