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| author | Pete Cooper <peter_cooper@apple.com> | 2011-11-14 19:38:42 +0000 |
|---|---|---|
| committer | Pete Cooper <peter_cooper@apple.com> | 2011-11-14 19:38:42 +0000 |
| commit | a77214a4c43d7a0c49c348439c6887f28bd6d53d (patch) | |
| tree | bc46d7f1d27b019c133fb52d7e4c78b723cbb297 /test | |
| parent | b518cae015f9a91aa5035e4047e50215a47a7bb2 (diff) | |
| download | external_llvm-a77214a4c43d7a0c49c348439c6887f28bd6d53d.zip external_llvm-a77214a4c43d7a0c49c348439c6887f28bd6d53d.tar.gz external_llvm-a77214a4c43d7a0c49c348439c6887f28bd6d53d.tar.bz2 | |
Changed SSE4/AVX <2 x i64> extract and insert ops to be Custom lowered
Constant idx case is still done in tablegen but other cases are then expanded
Fixes <rdar://problem/10435460>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144557 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/vector-variable-idx2.ll | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/test/CodeGen/X86/vector-variable-idx2.ll b/test/CodeGen/X86/vector-variable-idx2.ll new file mode 100644 index 0000000..d47df90 --- /dev/null +++ b/test/CodeGen/X86/vector-variable-idx2.ll @@ -0,0 +1,26 @@ +; RUN: llc < %s -march=x86-64 -mattr=+sse41 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin11.0.0" + +define i64 @__builtin_ia32_vec_ext_v2di(<2 x i64> %a, i32 %i) nounwind { + %1 = alloca <2 x i64>, align 16 + %2 = alloca i32, align 4 + store <2 x i64> %a, <2 x i64>* %1, align 16 + store i32 %i, i32* %2, align 4 + %3 = load <2 x i64>* %1, align 16 + %4 = load i32* %2, align 4 + %5 = extractelement <2 x i64> %3, i32 %4 + ret i64 %5 +} + +define <2 x i64> @__builtin_ia32_vec_int_v2di(<2 x i64> %a, i32 %i) nounwind { + %1 = alloca <2 x i64>, align 16 + %2 = alloca i32, align 4 + store <2 x i64> %a, <2 x i64>* %1, align 16 + store i32 %i, i32* %2, align 4 + %3 = load <2 x i64>* %1, align 16 + %4 = load i32* %2, align 4 + %5 = insertelement <2 x i64> %3, i64 1, i32 %4 + ret <2 x i64> %5 +} |