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authorEvan Cheng <evan.cheng@apple.com>2007-06-19 00:06:08 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-06-19 00:06:08 +0000
commitad0a4c0be927e5aeac2955ef119aa2021e050be1 (patch)
tree7e052434ae039b00d5ba79dccc9bb62719233771 /test
parent49892af2643cb81d33209a5f30ba02a04d6d52bc (diff)
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New test case: identity operation of RHS / LHS of a VECTOR_SHUFFLE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37637 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/X86/vec_shuffle-11.ll11
1 files changed, 11 insertions, 0 deletions
diff --git a/test/CodeGen/X86/vec_shuffle-11.ll b/test/CodeGen/X86/vec_shuffle-11.ll
new file mode 100644
index 0000000..553088f
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-11.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep mov
+
+define <4 x i32> @test() {
+ %tmp131 = call <2 x i64> @llvm.x86.sse2.psrl.dq( <2 x i64> < i64 -1, i64 -1 >, i32 96 ) ; <<2 x i64>> [#uses=1]
+ %tmp137 = bitcast <2 x i64> %tmp131 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp138 = and <4 x i32> %tmp137, bitcast (<2 x i64> < i64 -1, i64 -1 > to <4 x i32>) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %tmp138
+}
+
+declare <2 x i64> @llvm.x86.sse2.psrl.dq(<2 x i64>, i32)