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| author | Jim Grosbach <grosbach@apple.com> | 2011-06-28 00:19:13 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-06-28 00:19:13 +0000 |
| commit | adf7366771ebc78b3eee3c86b95e255ff5726da7 (patch) | |
| tree | 3f6019a3938b984fa68e73b9e71795486389dd45 /test | |
| parent | f46e7e3d7ff56d91572350c45ade83f4deea0139 (diff) | |
| download | external_llvm-adf7366771ebc78b3eee3c86b95e255ff5726da7.zip external_llvm-adf7366771ebc78b3eee3c86b95e255ff5726da7.tar.gz external_llvm-adf7366771ebc78b3eee3c86b95e255ff5726da7.tar.bz2 | |
ARM Thumb2 asm syntax optional destination operand for binary operators.
When the destination operand is the same as the first source register
operand for arithmetic instructions, the destination operand may be omitted.
For example, the following two instructions are equivalent:
and r1, #ff
and r1, r1, #ff
rdar://9672867
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133973 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/ARM/thumb2.s | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/test/MC/ARM/thumb2.s b/test/MC/ARM/thumb2.s index 1a268a9..41dda84 100644 --- a/test/MC/ARM/thumb2.s +++ b/test/MC/ARM/thumb2.s @@ -318,3 +318,23 @@ ldrexd r0, r1, [r0] @ CHECK: ssat16 r0, #7, r0 @ encoding: [0x20,0xf3,0x06,0x00] ssat16 r0, #7, r0 + + and r1, #0xff + and r1, r1, #0xff + orr r1, 0x100 + orr r1, r1, 0x100 + eor r1, 0x100 + eor r1, r1, 0x100 + bic r1, 0x100 + bic r1, r1, 0x100 + +@ CHECK: and r1, r1, #255 @ encoding: [0x01,0xf0,0xff,0x01] +@ CHECK: and r1, r1, #255 @ encoding: [0x01,0xf0,0xff,0x01] +@ CHECK: orr r1, r1, #256 @ encoding: [0x41,0xf4,0x80,0x71] +@ CHECK: orr r1, r1, #256 @ encoding: [0x41,0xf4,0x80,0x71] +@ CHECK: eor r1, r1, #256 @ encoding: [0x81,0xf4,0x80,0x71] +@ CHECK: eor r1, r1, #256 @ encoding: [0x81,0xf4,0x80,0x71] +@ CHECK: bic r1, r1, #256 @ encoding: [0x21,0xf4,0x80,0x71] +@ CHECK: bic r1, r1, #256 @ encoding: [0x21,0xf4,0x80,0x71] + + |