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author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-08-19 12:48:54 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-08-19 12:48:54 +0000 |
commit | b0d40a22e5aa1a51913fa161c2ce5513d7bd9293 (patch) | |
tree | 52334bd3daccd16d29c2a27180d1a2e986ec640e /test | |
parent | 80f54784da0bd42fb79176bbf447a31d69287fe3 (diff) | |
download | external_llvm-b0d40a22e5aa1a51913fa161c2ce5513d7bd9293.zip external_llvm-b0d40a22e5aa1a51913fa161c2ce5513d7bd9293.tar.gz external_llvm-b0d40a22e5aa1a51913fa161c2ce5513d7bd9293.tar.bz2 |
[SystemZ] Add integer absolute (load positive)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188670 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/SystemZ/int-abs-01.ll | 83 | ||||
-rw-r--r-- | test/MC/Disassembler/SystemZ/insns.txt | 36 | ||||
-rw-r--r-- | test/MC/SystemZ/insn-good.s | 30 |
3 files changed, 149 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/int-abs-01.ll b/test/CodeGen/SystemZ/int-abs-01.ll new file mode 100644 index 0000000..40fb611 --- /dev/null +++ b/test/CodeGen/SystemZ/int-abs-01.ll @@ -0,0 +1,83 @@ +; Test integer absolute. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s + +; Test i32->i32 absolute using slt. +define i32 @f1(i32 %val) { +; CHECK-LABEL: f1: +; CHECK: lpr %r2, %r2 +; CHECK: br %r14 + %cmp = icmp slt i32 %val, 0 + %neg = sub i32 0, %val + %res = select i1 %cmp, i32 %neg, i32 %val + ret i32 %res +} + +; Test i32->i32 absolute using sle. +define i32 @f2(i32 %val) { +; CHECK-LABEL: f2: +; CHECK: lpr %r2, %r2 +; CHECK: br %r14 + %cmp = icmp sle i32 %val, 0 + %neg = sub i32 0, %val + %res = select i1 %cmp, i32 %neg, i32 %val + ret i32 %res +} + +; Test i32->i32 absolute using sgt. +define i32 @f3(i32 %val) { +; CHECK-LABEL: f3: +; CHECK: lpr %r2, %r2 +; CHECK: br %r14 + %cmp = icmp sgt i32 %val, 0 + %neg = sub i32 0, %val + %res = select i1 %cmp, i32 %val, i32 %neg + ret i32 %res +} + +; Test i32->i32 absolute using sge. +define i32 @f4(i32 %val) { +; CHECK-LABEL: f4: +; CHECK: lpr %r2, %r2 +; CHECK: br %r14 + %cmp = icmp sge i32 %val, 0 + %neg = sub i32 0, %val + %res = select i1 %cmp, i32 %val, i32 %neg + ret i32 %res +} + +; Test i32->i64 absolute. +define i64 @f5(i32 %val) { +; CHECK-LABEL: f5: +; CHECK: lpgfr %r2, %r2 +; CHECK: br %r14 + %ext = sext i32 %val to i64 + %cmp = icmp slt i64 %ext, 0 + %neg = sub i64 0, %ext + %res = select i1 %cmp, i64 %neg, i64 %ext + ret i64 %res +} + +; Test i32->i64 absolute that uses an "in-register" form of sign extension. +define i64 @f6(i64 %val) { +; CHECK-LABEL: f6: +; CHECK: lpgfr %r2, %r2 +; CHECK: br %r14 + %trunc = trunc i64 %val to i32 + %ext = sext i32 %trunc to i64 + %cmp = icmp slt i64 %ext, 0 + %neg = sub i64 0, %ext + %res = select i1 %cmp, i64 %neg, i64 %ext + ret i64 %res +} + +; Test i64 absolute. +define i64 @f7(i64 %val) { +; CHECK-LABEL: f7: +; CHECK: lpgr %r2, %r2 +; CHECK: br %r14 + %cmp = icmp slt i64 %val, 0 + %neg = sub i64 0, %val + %res = select i1 %cmp, i64 %neg, i64 %val + ret i64 %res +} diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt index 328e2d6..9b31fd4 100644 --- a/test/MC/Disassembler/SystemZ/insns.txt +++ b/test/MC/Disassembler/SystemZ/insns.txt @@ -3535,6 +3535,42 @@ # CHECK: lpebr %f15, %f9 0xb3 0x00 0x00 0xf9 +# CHECK: lpgfr %r0, %r0 +0xb9 0x10 0x00 0x00 + +# CHECK: lpgfr %r0, %r15 +0xb9 0x10 0x00 0x0f + +# CHECK: lpgfr %r15, %r0 +0xb9 0x10 0x00 0xf0 + +# CHECK: lpgfr %r7, %r8 +0xb9 0x10 0x00 0x78 + +# CHECK: lpgr %r0, %r0 +0xb9 0x00 0x00 0x00 + +# CHECK: lpgr %r0, %r15 +0xb9 0x00 0x00 0x0f + +# CHECK: lpgr %r15, %r0 +0xb9 0x00 0x00 0xf0 + +# CHECK: lpgr %r7, %r8 +0xb9 0x00 0x00 0x78 + +# CHECK: lpr %r0, %r0 +0x10 0x00 + +# CHECK: lpr %r0, %r15 +0x10 0x0f + +# CHECK: lpr %r15, %r0 +0x10 0xf0 + +# CHECK: lpr %r7, %r8 +0x10 0x78 + # CHECK: lpxbr %f0, %f8 0xb3 0x40 0x00 0x08 diff --git a/test/MC/SystemZ/insn-good.s b/test/MC/SystemZ/insn-good.s index 52dc31d..47071f2 100644 --- a/test/MC/SystemZ/insn-good.s +++ b/test/MC/SystemZ/insn-good.s @@ -4757,6 +4757,36 @@ lpebr %f15,%f0 lpebr %f15,%f9 +#CHECK: lpgfr %r0, %r0 # encoding: [0xb9,0x10,0x00,0x00] +#CHECK: lpgfr %r0, %r15 # encoding: [0xb9,0x10,0x00,0x0f] +#CHECK: lpgfr %r15, %r0 # encoding: [0xb9,0x10,0x00,0xf0] +#CHECK: lpgfr %r7, %r8 # encoding: [0xb9,0x10,0x00,0x78] + + lpgfr %r0,%r0 + lpgfr %r0,%r15 + lpgfr %r15,%r0 + lpgfr %r7,%r8 + +#CHECK: lpgr %r0, %r0 # encoding: [0xb9,0x00,0x00,0x00] +#CHECK: lpgr %r0, %r15 # encoding: [0xb9,0x00,0x00,0x0f] +#CHECK: lpgr %r15, %r0 # encoding: [0xb9,0x00,0x00,0xf0] +#CHECK: lpgr %r7, %r8 # encoding: [0xb9,0x00,0x00,0x78] + + lpgr %r0,%r0 + lpgr %r0,%r15 + lpgr %r15,%r0 + lpgr %r7,%r8 + +#CHECK: lpr %r0, %r0 # encoding: [0x10,0x00] +#CHECK: lpr %r0, %r15 # encoding: [0x10,0x0f] +#CHECK: lpr %r15, %r0 # encoding: [0x10,0xf0] +#CHECK: lpr %r7, %r8 # encoding: [0x10,0x78] + + lpr %r0,%r0 + lpr %r0,%r15 + lpr %r15,%r0 + lpr %r7,%r8 + #CHECK: lpxbr %f0, %f8 # encoding: [0xb3,0x40,0x00,0x08] #CHECK: lpxbr %f0, %f13 # encoding: [0xb3,0x40,0x00,0x0d] #CHECK: lpxbr %f13, %f0 # encoding: [0xb3,0x40,0x00,0xd0] |