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| author | Reid Spencer <rspencer@reidspencer.com> | 2007-04-16 21:52:56 +0000 |
|---|---|---|
| committer | Reid Spencer <rspencer@reidspencer.com> | 2007-04-16 21:52:56 +0000 |
| commit | b579650f0183cb34ee9ff59c1b5318d21aca2ac7 (patch) | |
| tree | 26b78ca6853ddad7d28ba0f68a5b8f69e1654c55 /test | |
| parent | 4ccf462b999d66b46e155eaa8c2d0e7ac91ecdfc (diff) | |
| download | external_llvm-b579650f0183cb34ee9ff59c1b5318d21aca2ac7.zip external_llvm-b579650f0183cb34ee9ff59c1b5318d21aca2ac7.tar.gz external_llvm-b579650f0183cb34ee9ff59c1b5318d21aca2ac7.tar.bz2 | |
Also validate that the code generation of IntrinsicLowering for LLI works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36175 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/Generic/bit-intrinsics.ll | 31 |
1 files changed, 25 insertions, 6 deletions
diff --git a/test/CodeGen/Generic/bit-intrinsics.ll b/test/CodeGen/Generic/bit-intrinsics.ll index 22577d3..9ddafd0 100644 --- a/test/CodeGen/Generic/bit-intrinsics.ll +++ b/test/CodeGen/Generic/bit-intrinsics.ll @@ -1,15 +1,34 @@ ; Make sure this testcase is supported by all code generators. Either the ; intrinsic is supported natively or IntrinsicLowering provides it. -; RUN: llvm-as < %s | llc +; RUN: llvm-as < %s > %t.bc +; RUN: lli --force-interpreter=true %t.bc +; RUN: llc %t.bc -o /dev/null -f ; XFAIL: * +declare i32 @llvm.part.set.i32.i32.i32(i32 %x, i32 %rep, i32 %hi, i32 %lo) +declare i16 @llvm.part.set.i16.i16.i16(i16 %x, i16 %rep, i32 %hi, i32 %lo) +define i32 @test_part_set(i32 %A, i16 %B) { + %a = call i32 @llvm.part.set.i32.i32.i32(i32 %A, i32 27, i32 8, i32 0) + %b = call i16 @llvm.part.set.i16.i16.i16(i16 %B, i16 27, i32 8, i32 0) + %c = zext i16 %b to i32 + %d = add i32 %a, %c + ret i32 %d +} -declare i32 @llvm.bit.part.select.i32.i32(i32 %x, i32 %hi, i32 %lo) -declare i16 @llvm.bit.part.select.i16.i16(i16 %x, i32 %hi, i32 %lo) -define i32 @bit_part_select(i32 %A, i16 %B) { - %a = call i32 @llvm.bit.part.select.i32.i32(i32 %A, i32 8, i32 0) - %b = call i16 @llvm.bit.part.select.i16.i16(i16 %B, i32 8, i32 0) +declare i32 @llvm.part.select.i32.i32(i32 %x, i32 %hi, i32 %lo) +declare i16 @llvm.part.select.i16.i16(i16 %x, i32 %hi, i32 %lo) +define i32 @test_part_select(i32 %A, i16 %B) { + %a = call i32 @llvm.part.select.i32.i32(i32 %A, i32 8, i32 0) + %b = call i16 @llvm.part.select.i16.i16(i16 %B, i32 8, i32 0) %c = zext i16 %b to i32 %d = add i32 %a, %c ret i32 %d } + +define i32 @main(i32 %argc, i8** %argv) { + %a = call i32 @test_part_set(i32 23, i16 57) + %b = call i32 @test_part_select(i32 23, i16 57) + %c = add i32 %a, %b + %d = urem i32 %c, 1 + ret i32 %d +} |