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authorEvan Cheng <evan.cheng@apple.com>2012-06-26 22:03:13 +0000
committerEvan Cheng <evan.cheng@apple.com>2012-06-26 22:03:13 +0000
commitbbbe41384650142ce57ec469c2342952ed13b69d (patch)
treed6ee0b0bd63d293e8a49c9eebc680612196319a0 /test
parent4750c1d804a793edc1f00d4f8b9777352bb0a761 (diff)
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Remove a instcombine transform that (no longer?) makes sense:
// C - zext(bool) -> bool ? C - 1 : C if (ZExtInst *ZI = dyn_cast<ZExtInst>(Op1)) if (ZI->getSrcTy()->isIntegerTy(1)) return SelectInst::Create(ZI->getOperand(0), SubOne(C), C); This ends up forming sext i1 instructions that codegen to terrible code. e.g. int blah(_Bool x, _Bool y) { return (x - y) + 1; } => movzbl %dil, %eax movzbl %sil, %ecx shll $31, %ecx sarl $31, %ecx leal 1(%rax,%rcx), %eax ret Without the rule, llvm now generates: movzbl %sil, %ecx movzbl %dil, %eax incl %eax subl %ecx, %eax ret It also helps with ARM (and pretty much any target that doesn't have a sext i1 :-). The transformation was done as part of Eli's r75531. He has given the ok to remove it. rdar://11748024 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159230 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/Transforms/InstCombine/mul.ll5
-rw-r--r--test/Transforms/InstCombine/zext-bool-add-sub.ll39
2 files changed, 16 insertions, 28 deletions
diff --git a/test/Transforms/InstCombine/mul.ll b/test/Transforms/InstCombine/mul.ll
index edb5305..6c8e634 100644
--- a/test/Transforms/InstCombine/mul.ll
+++ b/test/Transforms/InstCombine/mul.ll
@@ -138,8 +138,9 @@ define i32 @test16(i32 %b, i1 %c) {
; e = b & (a >> 31)
%e = mul i32 %d, %b ; <i32> [#uses=1]
ret i32 %e
-; CHECK: [[TEST16:%.*]] = sext i1 %c to i32
-; CHECK-NEXT: %e = and i32 [[TEST16]], %b
+; CHECK: [[TEST16:%.*]] = zext i1 %c to i32
+; CHECK-NEXT: %1 = sub i32 0, [[TEST16]]
+; CHECK-NEXT: %e = and i32 %1, %b
; CHECK-NEXT: ret i32 %e
}
diff --git a/test/Transforms/InstCombine/zext-bool-add-sub.ll b/test/Transforms/InstCombine/zext-bool-add-sub.ll
index 1164273..78bcedb 100644
--- a/test/Transforms/InstCombine/zext-bool-add-sub.ll
+++ b/test/Transforms/InstCombine/zext-bool-add-sub.ll
@@ -1,29 +1,16 @@
-; RUN: opt < %s -instcombine -S | not grep zext
+; RUN: opt < %s -instcombine -S | FileCheck %s
+; rdar://11748024
-define i32 @a(i1 %x) {
+define i32 @a(i1 zeroext %x, i1 zeroext %y) {
entry:
- %y = zext i1 %x to i32
- %res = add i32 %y, 1
- ret i32 %res
-}
-
-define i32 @b(i1 %x) {
-entry:
- %y = zext i1 %x to i32
- %res = add i32 %y, -1
- ret i32 %res
-}
-
-define i32 @c(i1 %x) {
-entry:
- %y = zext i1 %x to i32
- %res = sub i32 0, %y
- ret i32 %res
-}
-
-define i32 @d(i1 %x) {
-entry:
- %y = zext i1 %x to i32
- %res = sub i32 3, %y
- ret i32 %res
+; CHECK: @a
+; CHECK: [[TMP1:%.*]] = zext i1 %y to i32
+; CHECK: [[TMP2:%.*]] = select i1 %x, i32 2, i32 1
+; CHECK-NEXT: sub i32 [[TMP2]], [[TMP1]]
+ %conv = zext i1 %x to i32
+ %conv3 = zext i1 %y to i32
+ %conv3.neg = sub i32 0, %conv3
+ %sub = add i32 %conv, 1
+ %add = add i32 %sub, %conv3.neg
+ ret i32 %add
}