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| author | Evan Cheng <evan.cheng@apple.com> | 2007-11-03 07:20:12 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-11-03 07:20:12 +0000 |
| commit | c4c75f53f7a933644abd1805e73cb4655b3beb5b (patch) | |
| tree | cfa61b666bad819e19da4b419ff10dd14365c76b /test | |
| parent | 68840707c8763f4e7a5377039b14d08fef6caef9 (diff) | |
| download | external_llvm-c4c75f53f7a933644abd1805e73cb4655b3beb5b.zip external_llvm-c4c75f53f7a933644abd1805e73cb4655b3beb5b.tar.gz external_llvm-c4c75f53f7a933644abd1805e73cb4655b3beb5b.tar.bz2 | |
There are times when the coalescer would not coalesce away a copy but the copy
can be eliminated by the allocator is the destination and source targets the
same register. The most common case is when the source and destination registers
are in different class. For example, on x86 mov32to32_ targets GR32_ which
contains a subset of the registers in GR32.
The allocator can do 2 things:
1. Set the preferred allocation for the destination of a copy to that of its source.
2. After allocation is done, change the allocation of a copy destination (if
legal) so the copy can be eliminated.
This eliminates 443 extra moves from 403.gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43662 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/postalloc-coalescing.ll | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/test/CodeGen/X86/postalloc-coalescing.ll b/test/CodeGen/X86/postalloc-coalescing.ll new file mode 100644 index 0000000..9c44a5a --- /dev/null +++ b/test/CodeGen/X86/postalloc-coalescing.ll @@ -0,0 +1,35 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 3 + +define fastcc i32 @_Z18yy_get_next_bufferv() { +entry: + br label %bb131 + +bb116: ; preds = %bb131 + %tmp125126 = trunc i32 %c.1 to i8 ; <i8> [#uses=1] + store i8 %tmp125126, i8* null, align 1 + br label %bb131 + +bb131: ; preds = %bb116, %entry + %c.2 = phi i32 [ %c.1, %bb116 ], [ 42, %entry ] ; <i32> [#uses=1] + %c.1 = select i1 false, i32 0, i32 %c.2 ; <i32> [#uses=4] + %tmp181 = icmp eq i32 %c.1, -1 ; <i1> [#uses=1] + br i1 %tmp181, label %bb158, label %bb116 + +bb158: ; preds = %bb131 + br i1 true, label %cond_true163, label %cond_next178 + +cond_true163: ; preds = %bb158 + %tmp172173 = trunc i32 %c.1 to i8 ; <i8> [#uses=1] + store i8 %tmp172173, i8* null, align 1 + br label %cond_next178 + +cond_next178: ; preds = %cond_true163, %bb158 + %tmp180 = icmp eq i32 %c.1, -1 ; <i1> [#uses=1] + br i1 %tmp180, label %cond_next184, label %cond_next199 + +cond_next184: ; preds = %cond_next178 + ret i32 0 + +cond_next199: ; preds = %cond_next178 + ret i32 0 +} |