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author | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-21 00:20:27 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-21 00:20:27 +0000 |
commit | c79507a4dd0c64e3d96fee6c57d0b2e3d14f4b77 (patch) | |
tree | b06fdacb1c28c2ae23c7a61b0052621b291c19a0 /test | |
parent | 7f162743fc7d68b19a6e21bba2a0aa810fc7897f (diff) | |
download | external_llvm-c79507a4dd0c64e3d96fee6c57d0b2e3d14f4b77.zip external_llvm-c79507a4dd0c64e3d96fee6c57d0b2e3d14f4b77.tar.gz external_llvm-c79507a4dd0c64e3d96fee6c57d0b2e3d14f4b77.tar.bz2 |
Expand 64-bit CTLZ nodes if target architecture does not support it. Add test
case for DCLO and DCLZ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147022 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/Mips/mips64countleading.ll | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/mips64countleading.ll b/test/CodeGen/Mips/mips64countleading.ll new file mode 100644 index 0000000..b2b67e5 --- /dev/null +++ b/test/CodeGen/Mips/mips64countleading.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s + +define i64 @t1(i64 %X) nounwind readnone { +entry: +; CHECK: dclz + %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X, i1 true) + ret i64 %tmp1 +} + +declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone + +define i64 @t3(i64 %X) nounwind readnone { +entry: +; CHECK: dclo + %neg = xor i64 %X, -1 + %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg, i1 true) + ret i64 %tmp1 +} + |