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author | Shuxin Yang <shuxin.llvm@gmail.com> | 2012-12-04 00:04:54 +0000 |
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committer | Shuxin Yang <shuxin.llvm@gmail.com> | 2012-12-04 00:04:54 +0000 |
commit | c811976b0400257511f2a255ec70538c3614f85e (patch) | |
tree | 1f1290d99a7f23d2c7d49d1e7c8a290589361ae8 /test | |
parent | fc6374439edf2f74da4026f4cea8e341d092be5c (diff) | |
download | external_llvm-c811976b0400257511f2a255ec70538c3614f85e.zip external_llvm-c811976b0400257511f2a255ec70538c3614f85e.tar.gz external_llvm-c811976b0400257511f2a255ec70538c3614f85e.tar.bz2 |
rdar://12329730 (2nd part)
This change tries to simmplify E1 = " X >> C1 << C2" into :
- E2 = "X << (C2 - C1)" if C2 > C1, or
- E2 = "X >> (C1 - C2)" if C1 > C2, or
- E2 = X if C1 == C2.
Reviewed by Nadav. Thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169182 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/Transforms/InstCombine/2010-11-01-lshr-mask.ll | 4 | ||||
-rw-r--r-- | test/Transforms/InstCombine/shift.ll | 76 | ||||
-rw-r--r-- | test/Transforms/InstCombine/signext.ll | 4 |
3 files changed, 80 insertions, 4 deletions
diff --git a/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll b/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll index eb28994..5efad8a 100644 --- a/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll +++ b/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll @@ -5,8 +5,8 @@ define i32 @main(i32 %argc) nounwind ssp { entry: %tmp3151 = trunc i32 %argc to i8 -; CHECK: %tmp3163 = shl i8 %tmp3162, 6 -; CHECK: and i8 %tmp3163, 64 +; CHECK: %tmp3162 = shl i8 %tmp3151, 5 +; CHECK: and i8 %tmp3162, 64 ; CHECK-NOT: shl ; CHECK-NOT: shr %tmp3161 = or i8 %tmp3151, -17 diff --git a/test/Transforms/InstCombine/shift.ll b/test/Transforms/InstCombine/shift.ll index 25e708b..b152816 100644 --- a/test/Transforms/InstCombine/shift.ll +++ b/test/Transforms/InstCombine/shift.ll @@ -659,3 +659,79 @@ define i32 @test53(i32 %x) { ; CHECK-NEXT: %B = shl nuw i32 %x, 2 ; CHECK-NEXT: ret i32 %B } + +define i32 @test54(i32 %x) { + %shr2 = lshr i32 %x, 1 + %shl = shl i32 %shr2, 4 + %and = and i32 %shl, 16 + ret i32 %and +; CHECK: @test54 +; CHECK: shl i32 %x, 3 +} + + +define i32 @test55(i32 %x) { + %shr2 = lshr i32 %x, 1 + %shl = shl i32 %shr2, 4 + %or = or i32 %shl, 8 + ret i32 %or +; CHECK: @test55 +; CHECK: shl i32 %x, 3 +} + +define i32 @test56(i32 %x) { + %shr2 = lshr i32 %x, 1 + %shl = shl i32 %shr2, 4 + %or = or i32 %shl, 7 + ret i32 %or +; CHECK: @test56 +; CHECK: shl i32 %shr2, 4 +} + + +define i32 @test57(i32 %x) { + %shr = lshr i32 %x, 1 + %shl = shl i32 %shr, 4 + %and = and i32 %shl, 16 + ret i32 %and +; CHECK: @test57 +; CHECK: shl i32 %x, 3 +} + +define i32 @test58(i32 %x) { + %shr = lshr i32 %x, 1 + %shl = shl i32 %shr, 4 + %or = or i32 %shl, 8 + ret i32 %or +; CHECK: @test58 +; CHECK: shl i32 %x, 3 +} + +define i32 @test59(i32 %x) { + %shr = ashr i32 %x, 1 + %shl = shl i32 %shr, 4 + %or = or i32 %shl, 7 + ret i32 %or +; CHECK: @test59 +; CHECK: %shl = shl i32 %shr1, 4 +} + + +define i32 @test60(i32 %x) { + %shr = ashr i32 %x, 4 + %shl = shl i32 %shr, 1 + %or = or i32 %shl, 1 + ret i32 %or +; CHECK: @test60 +; CHECK: lshr i32 %x, 3 +} + + +define i32 @test61(i32 %x) { + %shr = ashr i32 %x, 4 + %shl = shl i32 %shr, 1 + %or = or i32 %shl, 2 + ret i32 %or +; CHECK: @test61 +; CHECK: ashr i32 %x, 4 +} diff --git a/test/Transforms/InstCombine/signext.ll b/test/Transforms/InstCombine/signext.ll index ecee983..5ed1cd5 100644 --- a/test/Transforms/InstCombine/signext.ll +++ b/test/Transforms/InstCombine/signext.ll @@ -82,6 +82,6 @@ entry: %sub = add i32 %xor, -67108864 ; <i32> [#uses=1] ret i32 %sub ; CHECK: @test8 -; CHECK: %shr = ashr i32 %x, 5 -; CHECK: ret i32 %shr +; CHECK: %sub = ashr i32 %x, 5 +; CHECK: ret i32 %sub } |