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author | Bob Wilson <bob.wilson@apple.com> | 2010-08-04 00:12:08 +0000 |
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committer | Bob Wilson <bob.wilson@apple.com> | 2010-08-04 00:12:08 +0000 |
commit | c91d5cdfe124447b07c6db932a4f95ba857b8daa (patch) | |
tree | 5dafc13378bdfc199028991f1103c1e6142d3176 /test | |
parent | a4100258b63781ad92c96c0d4e49a98ec8757d5d (diff) | |
download | external_llvm-c91d5cdfe124447b07c6db932a4f95ba857b8daa.zip external_llvm-c91d5cdfe124447b07c6db932a4f95ba857b8daa.tar.gz external_llvm-c91d5cdfe124447b07c6db932a4f95ba857b8daa.tar.bz2 |
Combine NEON VABD (absolute difference) intrinsics with ADDs to make VABA
(absolute difference with accumulate) intrinsics. Radar 8228576.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110170 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/ARM/vaba.ll | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/vaba.ll b/test/CodeGen/ARM/vaba.ll index e2dca46..e7aa6ae 100644 --- a/test/CodeGen/ARM/vaba.ll +++ b/test/CodeGen/ARM/vaba.ll @@ -203,3 +203,27 @@ declare <2 x i64> @llvm.arm.neon.vabals.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) n declare <8 x i16> @llvm.arm.neon.vabalu.v8i16(<8 x i16>, <8 x i8>, <8 x i8>) nounwind readnone declare <4 x i32> @llvm.arm.neon.vabalu.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone declare <2 x i64> @llvm.arm.neon.vabalu.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone + +define <8 x i8> @vabd_combine_s8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +;CHECK: vabd_combine_s8: +;CHECK: vaba.s8 + %tmp1 = load <8 x i8>* %A + %tmp2 = load <8 x i8>* %B + %tmp3 = call <8 x i8> @llvm.arm.neon.vabds.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2) + %tmp4 = add <8 x i8> %tmp2, %tmp3 + ret <8 x i8> %tmp4 +} + +define <4 x i16> @vabd_combine_u16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +;CHECK: vabd_combine_u16: +;CHECK: vaba.u16 + %tmp1 = load <4 x i16>* %A + %tmp2 = load <4 x i16>* %B + %tmp3 = call <4 x i16> @llvm.arm.neon.vabdu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2) + %tmp4 = add <4 x i16> %tmp3, %tmp1 + ret <4 x i16> %tmp4 +} + +declare <8 x i8> @llvm.arm.neon.vabds.v8i8(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.arm.neon.vabdu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone + |