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| author | Evan Cheng <evan.cheng@apple.com> | 2008-05-09 21:53:03 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-05-09 21:53:03 +0000 |
| commit | d880b97257c7f8ec4e94948874cb87c865d9f96f (patch) | |
| tree | 59d6c369dc79d145efdb3db769c0de0240fc14c9 /test | |
| parent | c6c6a3e2b3ffa580cb84d75a2c60a961977e40d1 (diff) | |
| download | external_llvm-d880b97257c7f8ec4e94948874cb87c865d9f96f.zip external_llvm-d880b97257c7f8ec4e94948874cb87c865d9f96f.tar.gz external_llvm-d880b97257c7f8ec4e94948874cb87c865d9f96f.tar.bz2 | |
Handle a few more cases of folding load i64 into xmm and zero top bits.
Note, some of the code will be moved into target independent part of DAG combiner in a subsequent patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50918 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/vec_set-C.ll | 1 | ||||
| -rw-r--r-- | test/CodeGen/X86/vec_set-F.ll | 19 |
2 files changed, 20 insertions, 0 deletions
diff --git a/test/CodeGen/X86/vec_set-C.ll b/test/CodeGen/X86/vec_set-C.ll index eef9a61..fc86853 100644 --- a/test/CodeGen/X86/vec_set-C.ll +++ b/test/CodeGen/X86/vec_set-C.ll @@ -1,4 +1,5 @@ ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep mov | count 1 ; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep movd define <2 x i64> @t1(i64 %x) nounwind { diff --git a/test/CodeGen/X86/vec_set-F.ll b/test/CodeGen/X86/vec_set-F.ll new file mode 100644 index 0000000..db83eb2 --- /dev/null +++ b/test/CodeGen/X86/vec_set-F.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep mov | count 3 + +define <2 x i64> @t1(<2 x i64>* %ptr) nounwind { + %tmp45 = bitcast <2 x i64>* %ptr to <2 x i32>* + %tmp615 = load <2 x i32>* %tmp45 + %tmp7 = bitcast <2 x i32> %tmp615 to i64 + %tmp8 = insertelement <2 x i64> zeroinitializer, i64 %tmp7, i32 0 + ret <2 x i64> %tmp8 +} + +define <2 x i64> @t2(i64 %x) nounwind { + %tmp717 = bitcast i64 %x to double + %tmp8 = insertelement <2 x double> undef, double %tmp717, i32 0 + %tmp9 = insertelement <2 x double> %tmp8, double 0.000000e+00, i32 1 + %tmp11 = bitcast <2 x double> %tmp9 to <2 x i64> + ret <2 x i64> %tmp11 +} |