diff options
author | Nate Begeman <natebegeman@mac.com> | 2009-04-24 03:42:54 +0000 |
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committer | Nate Begeman <natebegeman@mac.com> | 2009-04-24 03:42:54 +0000 |
commit | da17a81c88162e6dfc070f18b14e34f194697407 (patch) | |
tree | 105e75ce0dc135a208ef085ba4f70fe162031ff1 /test | |
parent | bbb69ba45e6b90251bebed4f3a76456d9d51f903 (diff) | |
download | external_llvm-da17a81c88162e6dfc070f18b14e34f194697407.zip external_llvm-da17a81c88162e6dfc070f18b14e34f194697407.tar.gz external_llvm-da17a81c88162e6dfc070f18b14e34f194697407.tar.bz2 |
PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69952 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/X86/vec_clear.ll | 6 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-10.ll | 10 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-16.ll | 12 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-30.ll | 7 | ||||
-rw-r--r-- | test/CodeGen/X86/vec_shuffle-31.ll | 2 |
5 files changed, 19 insertions, 18 deletions
diff --git a/test/CodeGen/X86/vec_clear.ll b/test/CodeGen/X86/vec_clear.ll index c119a94..514de95 100644 --- a/test/CodeGen/X86/vec_clear.ll +++ b/test/CodeGen/X86/vec_clear.ll @@ -1,5 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin | not grep and -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin | grep psrldq +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t -f +; RUN: not grep and %t +; RUN: not grep psrldq %t +; RUN: grep xorps %t define <4 x float> @test(<4 x float>* %v1) nounwind { %tmp = load <4 x float>* %v1 ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/X86/vec_shuffle-10.ll b/test/CodeGen/X86/vec_shuffle-10.ll index 45789b0..297469d 100644 --- a/test/CodeGen/X86/vec_shuffle-10.ll +++ b/test/CodeGen/X86/vec_shuffle-10.ll @@ -1,9 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | \ -; RUN: grep unpcklps | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | \ -; RUN: grep unpckhps | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | \ -; RUN: not grep {sub.*esp} +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep unpcklps %t | count 1 +; RUN: grep pshufd %t | count 1 +; RUN: not grep {sub.*esp} %t define void @test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B) { %tmp = load <4 x float>* %B ; <<4 x float>> [#uses=2] diff --git a/test/CodeGen/X86/vec_shuffle-16.ll b/test/CodeGen/X86/vec_shuffle-16.ll index 79de903..b3a5b76 100644 --- a/test/CodeGen/X86/vec_shuffle-16.ll +++ b/test/CodeGen/X86/vec_shuffle-16.ll @@ -1,8 +1,10 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,-sse2 | grep shufps | count 4 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,-sse2 -mtriple=i386-apple-darwin | grep mov | count 2 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pshufd | count 4 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep shufps -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin | not grep mov +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,-sse2 -mtriple=i386-apple-darwin -o %t -f +; RUN: grep shufps %t | count 4 +; RUN: grep movaps %t | count 2 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t -f +; RUN: grep pshufd %t | count 4 +; RUN: not grep shufps %t +; RUN: not grep mov %t define <4 x float> @t1(<4 x float> %a, <4 x float> %b) nounwind { %tmp1 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> zeroinitializer diff --git a/test/CodeGen/X86/vec_shuffle-30.ll b/test/CodeGen/X86/vec_shuffle-30.ll index 38f02fe..50a3df8 100644 --- a/test/CodeGen/X86/vec_shuffle-30.ll +++ b/test/CodeGen/X86/vec_shuffle-30.ll @@ -1,8 +1,7 @@ ; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -disable-mmx -o %t -f ; RUN: grep pshufhw %t | grep 161 | count 1 -; RUN: grep pslldq %t | count 1 - - +; RUN: grep shufps %t | count 1 +; RUN: not grep pslldq %t ; Test case when creating pshufhw, we incorrectly set the higher order bit ; for an undef, @@ -20,4 +19,4 @@ entry: %0 = shufflevector <4 x i32> %in, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> < i32 undef, i32 5, i32 undef, i32 2> store <4 x i32> %0, <4 x i32>* %dest ret void -}
\ No newline at end of file +} diff --git a/test/CodeGen/X86/vec_shuffle-31.ll b/test/CodeGen/X86/vec_shuffle-31.ll index 0a9dc1f..efcd030 100644 --- a/test/CodeGen/X86/vec_shuffle-31.ll +++ b/test/CodeGen/X86/vec_shuffle-31.ll @@ -1,6 +1,6 @@ ; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -o %t -f ; RUN: grep pextrw %t | count 1 -; RUN: grep punpcklqdq %t | count 1 +; RUN: grep movlhps %t | count 1 ; RUN: grep pshufhw %t | count 1 ; RUN: grep pinsrw %t | count 1 ; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t -f |