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authorEvan Cheng <evan.cheng@apple.com>2010-07-14 06:44:01 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-07-14 06:44:01 +0000
commitdedd974e7e47ba3091363f9b97e4881c6ec36edf (patch)
tree28b84cd01d32ad26f3695c8071b988393ba72d56 /test
parent7e3f0d26908b82bc6a3699251e0d38821610bca7 (diff)
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Fix for PR7193 was overly conservative. The only case where sibcall callee
address cannot be allocated a register is in 32-bit mode where the first three arguments are marked inreg. In that case EAX, EDX, and ECX will be used for argument passing. This fixes PR7610. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108327 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/X86/sibcall-4.ll13
1 files changed, 13 insertions, 0 deletions
diff --git a/test/CodeGen/X86/sibcall-4.ll b/test/CodeGen/X86/sibcall-4.ll
new file mode 100644
index 0000000..1499e66
--- /dev/null
+++ b/test/CodeGen/X86/sibcall-4.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu | FileCheck %s
+; pr7610
+
+define cc10 void @t(i32* %Base_Arg, i32* %Sp_Arg, i32* %Hp_Arg, i32 %R1_Arg) nounwind {
+cm1:
+; CHECK: t:
+; CHECK: jmpl *%eax
+ %nm3 = getelementptr i32* %Sp_Arg, i32 1
+ %nm9 = load i32* %Sp_Arg
+ %nma = inttoptr i32 %nm9 to void (i32*, i32*, i32*, i32)*
+ tail call cc10 void %nma(i32* %Base_Arg, i32* %nm3, i32* %Hp_Arg, i32 %R1_Arg) nounwind
+ ret void
+}