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authorBill Wendling <isanbard@gmail.com>2012-03-10 07:37:27 +0000
committerBill Wendling <isanbard@gmail.com>2012-03-10 07:37:27 +0000
commite060eb8916820fb7a2035dd14c848aa1fd545efe (patch)
tree819e40eed219d8ec827d8226a7e98911be31221d /test
parentfbf9ff462134a635eb0fc3bc86c70cc59fb065d1 (diff)
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Fix disasm of iret, sysexit, and sysret when displayed with Intel syntax.
Patch by Kay Tiong Khoo! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152487 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/MC/Disassembler/X86/intel-syntax.txt22
1 files changed, 22 insertions, 0 deletions
diff --git a/test/MC/Disassembler/X86/intel-syntax.txt b/test/MC/Disassembler/X86/intel-syntax.txt
index 54b242d..e2883c7 100644
--- a/test/MC/Disassembler/X86/intel-syntax.txt
+++ b/test/MC/Disassembler/X86/intel-syntax.txt
@@ -77,3 +77,25 @@
# CHECK: test RAX, 0
0x48 0xa9 0x00 0x00 0x00 0x00
+
+# CHECK: sysret
+0x48 0x0f 0x07
+
+# CHECK: sysret
+0x0f 0x07
+
+# CHECK: sysexit
+0x48 0x0f 0x35
+
+# CHECK: sysexit
+0x0f 0x35
+
+# CHECK: iret
+0x66 0xcf
+
+# CHECK: iretd
+0xcf
+
+# CHECK: iretq
+0x48 0xcf
+