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| author | Tim Northover <tnorthover@apple.com> | 2013-06-10 20:43:49 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-06-10 20:43:49 +0000 |
| commit | e5609f37323b105c7720d5d423a9203d1e869c29 (patch) | |
| tree | b833920ba791a63f5f903bc006254ac93541442e /test | |
| parent | 6d315c6cf201a111d6e7c9118fafc6c39915d1db (diff) | |
| download | external_llvm-e5609f37323b105c7720d5d423a9203d1e869c29.zip external_llvm-e5609f37323b105c7720d5d423a9203d1e869c29.tar.gz external_llvm-e5609f37323b105c7720d5d423a9203d1e869c29.tar.bz2 | |
X86: Stop LEA64_32r doing unspeakable things to its arguments.
Previously LEA64_32r went through virtually the entire backend thinking it was
using 32-bit registers until its blissful illusions were cruelly snatched away
by MCInstLower and 64-bit equivalents were substituted at the last minute.
This patch makes it behave normally, and take 64-bit registers as sources all
the way through. Previous uses (for 32-bit arithmetic) are accommodated via
SUBREG_TO_REG instructions which make the types and classes agree properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183693 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/MachineSink-CritEdge.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/lea.ll | 7 | ||||
| -rw-r--r-- | test/CodeGen/X86/machine-cse.ll | 3 |
3 files changed, 8 insertions, 6 deletions
diff --git a/test/CodeGen/X86/MachineSink-CritEdge.ll b/test/CodeGen/X86/MachineSink-CritEdge.ll index 74a1049..bc05835 100644 --- a/test/CodeGen/X86/MachineSink-CritEdge.ll +++ b/test/CodeGen/X86/MachineSink-CritEdge.ll @@ -30,10 +30,10 @@ land.lhs.true: %cmp4 = icmp eq i32 %call3, 10 br i1 %cmp4, label %do.body.preheader, label %if.then -; %shl.i should be sinked all the way down to do.body.preheader, but not into the loop. +; %add16.i should be sinked all the way down to do.body.preheader, but not into the loop. ; CHECK: do.body.preheader ; CHECK-NOT: do.body -; CHECK: shll $12 +; CHECK: leal ([[SRC:%r[a-z0-9]+]],[[SRC]],8) do.body.preheader: %xor29.i = xor i32 %shr27.i, %add25.i diff --git a/test/CodeGen/X86/lea.ll b/test/CodeGen/X86/lea.ll index 5421355..87f0b0b 100644 --- a/test/CodeGen/X86/lea.ll +++ b/test/CodeGen/X86/lea.ll @@ -6,7 +6,7 @@ define i32 @test1(i32 %x) nounwind { %tmp2 = add i32 %tmp1, 7 ret i32 %tmp2 ; CHECK: test1: -; CHECK: leal 7(,[[A0:%rdi|%rcx]],8), %eax +; CHECK: leal 7(,%r[[A0:di|cx]],8), %eax } @@ -28,8 +28,9 @@ bb.nph: bb2: ret i32 %x_offs ; CHECK: test2: -; CHECK: leal -5([[A0]]), %eax +; CHECK: movl %e[[A0]], %eax +; CHECK: addl $-5, %eax ; CHECK: andl $-4, %eax ; CHECK: negl %eax -; CHECK: leal -4([[A0]],%rax), %eax +; CHECK: leal -4(%r[[A0]],%rax), %eax } diff --git a/test/CodeGen/X86/machine-cse.ll b/test/CodeGen/X86/machine-cse.ll index d171fd5..b42d82e 100644 --- a/test/CodeGen/X86/machine-cse.ll +++ b/test/CodeGen/X86/machine-cse.ll @@ -52,13 +52,14 @@ entry: ] sw.bb: ; preds = %entry, %entry, %entry +; CHECK: %sw.bb +; CHECK: imull %mul = mul nsw i32 %test_case, 3 %mul20 = mul nsw i32 %mul, %scale br i1 undef, label %if.end34, label %sw.bb307 if.end34: ; preds = %sw.bb ; CHECK: %if.end34 -; CHECK: imull ; CHECK: leal ; CHECK-NOT: imull tail call void (...)* @printf(i32 %test_case, i32 %mul20) nounwind |