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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-08-14 23:24:53 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-08-14 23:24:53 +0000 |
| commit | e8e33f448e8830590c498ac5101ef8b27446ca3b (patch) | |
| tree | 2aada1408e415c2de01557c54d4804568f3bdd09 /test | |
| parent | 68db37b952be497c94c7aa98cf26f3baadb5afd3 (diff) | |
| download | external_llvm-e8e33f448e8830590c498ac5101ef8b27446ca3b.zip external_llvm-e8e33f448e8830590c498ac5101ef8b27446ca3b.tar.gz external_llvm-e8e33f448e8830590c498ac5101ef8b27446ca3b.tar.bz2 | |
R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188430 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/R600/llvm.SI.sample.ll | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/test/CodeGen/R600/llvm.SI.sample.ll b/test/CodeGen/R600/llvm.SI.sample.ll index 1c830a9..2651b99 100644 --- a/test/CodeGen/R600/llvm.SI.sample.ll +++ b/test/CodeGen/R600/llvm.SI.sample.ll @@ -135,6 +135,23 @@ define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { ret void } +; CHECK: @v1 +; CHECK: IMAGE_SAMPLE VGPR{{[[0-9]}}_VGPR{{[0-9]}}_VGPR{{[0-9]}}_VGPR{{[0-9]}}, 15 +define void @v1(i32 %a1) { +entry: + %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 + %1 = call <4 x float> @llvm.SI.sample.v1i32(<1 x i32> %0, <32 x i8> undef, <16 x i8> undef, i32 0) + %2 = extractelement <4 x float> %1, i32 0 + %3 = extractelement <4 x float> %1, i32 1 + %4 = extractelement <4 x float> %1, i32 2 + %5 = extractelement <4 x float> %1, i32 3 + call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %2, float %3, float %4, float %5) + ret void +} + + +declare <4 x float> @llvm.SI.sample.v1i32(<1 x i32>, <32 x i8>, <16 x i8>, i32) readnone + declare <4 x float> @llvm.SI.sample.(<4 x i32>, <32 x i8>, <16 x i8>, i32) readnone declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) |