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| author | Richard Osborne <richard@xmos.com> | 2010-03-10 11:41:08 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2010-03-10 11:41:08 +0000 |
| commit | ebc64cf780e6e0200cd462f26e9925dcc7632f2b (patch) | |
| tree | 4e8f3cd761b329eaa2c00942df285e9908d6f257 /test | |
| parent | 1250ac8a098cea157713049048e325735a8e090e (diff) | |
| download | external_llvm-ebc64cf780e6e0200cd462f26e9925dcc7632f2b.zip external_llvm-ebc64cf780e6e0200cd462f26e9925dcc7632f2b.tar.gz external_llvm-ebc64cf780e6e0200cd462f26e9925dcc7632f2b.tar.bz2 | |
Lower add (mul a, b), c into MACCU / MACCS nodes which translate
directly to the maccu / maccs instructions. We handle this in
ExpandADDSUB since after type legalisation it is messy to
recognise these operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98150 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/XCore/addsub64.ll | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/test/CodeGen/XCore/addsub64.ll b/test/CodeGen/XCore/addsub64.ll index 7053664..0432e5e 100644 --- a/test/CodeGen/XCore/addsub64.ll +++ b/test/CodeGen/XCore/addsub64.ll @@ -18,3 +18,27 @@ define i64 @sub64(i64 %a, i64 %b) { ; CHECK-NEXT: lsub r2, r0, r0, r2, r11 ; CHECK-NEXT: lsub r2, r1, r1, r3, r2 ; CHECK-NEXT: retsp 0 + +define i64 @maccu(i64 %a, i32 %b, i32 %c) { +entry: + %0 = zext i32 %b to i64 + %1 = zext i32 %c to i64 + %2 = mul i64 %1, %0 + %3 = add i64 %2, %a + ret i64 %3 +} +; CHECK: maccu: +; CHECK: maccu r1, r0, r3, r2 +; CHECK-NEXT: retsp 0 + +define i64 @maccs(i64 %a, i32 %b, i32 %c) { +entry: + %0 = sext i32 %b to i64 + %1 = sext i32 %c to i64 + %2 = mul i64 %1, %0 + %3 = add i64 %2, %a + ret i64 %3 +} +; CHECK: maccs: +; CHECK: maccs r1, r0, r3, r2 +; CHECK-NEXT: retsp 0 |