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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-04 17:57:06 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-04 17:57:06 +0000 |
| commit | f0378f4381101ed2c64643de9603c5f4d835a17c (patch) | |
| tree | 664e19072325bb5bf0103ed1893215b6d0ed44b4 /test | |
| parent | 8c345b456768ea2fb1864ba6dbdbca9f7e614b50 (diff) | |
| download | external_llvm-f0378f4381101ed2c64643de9603c5f4d835a17c.zip external_llvm-f0378f4381101ed2c64643de9603c5f4d835a17c.tar.gz external_llvm-f0378f4381101ed2c64643de9603c5f4d835a17c.tar.bz2 | |
Add a test case for mips64 unaligned load/store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157939 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/Mips/mips64load-store-left-right.ll | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/mips64load-store-left-right.ll b/test/CodeGen/Mips/mips64load-store-left-right.ll new file mode 100644 index 0000000..4561429 --- /dev/null +++ b/test/CodeGen/Mips/mips64load-store-left-right.ll @@ -0,0 +1,73 @@ +; RUN: llc -march=mips64el -mcpu=mips64 -mattr=n64 < %s | FileCheck -check-prefix=EL %s +; RUN: llc -march=mips64 -mcpu=mips64 -mattr=n64 < %s | FileCheck -check-prefix=EB %s + +%struct.SLL = type { i64 } +%struct.SI = type { i32 } +%struct.SUI = type { i32 } + +@sll = common global %struct.SLL zeroinitializer, align 1 +@si = common global %struct.SI zeroinitializer, align 1 +@sui = common global %struct.SUI zeroinitializer, align 1 + +define i64 @foo_load_ll() nounwind readonly { +entry: +; EL: ldl $[[R0:[0-9]+]], 7($[[R1:[0-9]+]]) +; EL: ldr $[[R0]], 0($[[R1]]) +; EB: ldl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]]) +; EB: ldr $[[R0]], 7($[[R1]]) + + %0 = load i64* getelementptr inbounds (%struct.SLL* @sll, i64 0, i32 0), align 1 + ret i64 %0 +} + +define i64 @foo_load_i() nounwind readonly { +entry: +; EL: lwl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]]) +; EL: lwr $[[R0]], 0($[[R1]]) +; EB: lwl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]]) +; EB: lwr $[[R0]], 3($[[R1]]) + + %0 = load i32* getelementptr inbounds (%struct.SI* @si, i64 0, i32 0), align 1 + %conv = sext i32 %0 to i64 + ret i64 %conv +} + +define i64 @foo_load_ui() nounwind readonly { +entry: +; EL: lwl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]]) +; EL: lwr $[[R0]], 0($[[R1]]) +; EL: daddiu $[[R2:[0-9]+]], $zero, 1 +; EL: dsll $[[R3:[0-9]+]], $[[R2]], 32 +; EL: daddiu $[[R4:[0-9]+]], $[[R3]], -1 +; EL: and ${{[0-9]+}}, $[[R0]], $[[R4]] +; EB: lwl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]]) +; EB: lwr $[[R0]], 3($[[R1]]) + + + %0 = load i32* getelementptr inbounds (%struct.SUI* @sui, i64 0, i32 0), align 1 + %conv = zext i32 %0 to i64 + ret i64 %conv +} + +define void @foo_store_ll(i64 %a) nounwind { +entry: +; EL: sdl $[[R0:[0-9]+]], 7($[[R1:[0-9]+]]) +; EL: sdr $[[R0]], 0($[[R1]]) +; EB: sdl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]]) +; EB: sdr $[[R0]], 7($[[R1]]) + + store i64 %a, i64* getelementptr inbounds (%struct.SLL* @sll, i64 0, i32 0), align 1 + ret void +} + +define void @foo_store_i(i32 %a) nounwind { +entry: +; EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]]) +; EL: swr $[[R0]], 0($[[R1]]) +; EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]]) +; EB: swr $[[R0]], 3($[[R1]]) + + store i32 %a, i32* getelementptr inbounds (%struct.SI* @si, i64 0, i32 0), align 1 + ret void +} + |