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| author | Richard Osborne <richard@xmos.com> | 2013-01-27 20:42:57 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2013-01-27 20:42:57 +0000 |
| commit | f5e7e793f196cfba4427321ee9f38ecc8bb8470f (patch) | |
| tree | 42a66f6013d44e6f2414ef8c5a67b88261c34c59 /test | |
| parent | 245b657ab636a505066ea6a81591a9a8b93604d2 (diff) | |
| download | external_llvm-f5e7e793f196cfba4427321ee9f38ecc8bb8470f.zip external_llvm-f5e7e793f196cfba4427321ee9f38ecc8bb8470f.tar.gz external_llvm-f5e7e793f196cfba4427321ee9f38ecc8bb8470f.tar.bz2 | |
[XCore] Add missing 0r instructions.
These instructions are not targeted by the compiler but they are
needed for the MC layer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173623 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/Disassembler/XCore/xcore.txt | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/test/MC/Disassembler/XCore/xcore.txt b/test/MC/Disassembler/XCore/xcore.txt index e1cec70..c620587 100644 --- a/test/MC/Disassembler/XCore/xcore.txt +++ b/test/MC/Disassembler/XCore/xcore.txt @@ -21,6 +21,57 @@ # CHECK: waiteu 0xec 0x07 +# CHECK: dcall +0xfc 0x07 + +# CHECK: dentsp +0xec 0x17 + +# CHECK: drestsp +0xed 0x17 + +# CHECK: dret +0xfe 0x07 + +# CHECK: freet +0xef 0x07 + +# CHECK: get r11, kep +0xef 0x17 + +# CHECK: get r11, ksp +0xfc 0x17 + +# CHECK: kret +0xfd 0x07 + +# CHECK: ldw et, sp[4] +0xfe 0x17 + +# CHECK: ldw sed, sp[3] +0xfd 0x17 + +# CHECK: ldw spc, sp[1] +0xec 0x0f + +# CHECK: ldw ssr, sp[2] +0xee 0x0f + +# CHECK: set kep, r11 +0xff 0x07 + +# CHECK: stw et, sp[4] +0xfd 0x0f + +# CHECK: stw sed, sp[3] +0xfc 0x0f + +# CHECK: stw spc, sp[1] +0xed 0x0f + +# CHECK: stw ssr, sp[2] +0xef 0x0f + # 1r instructions # CHECK: msync res[r0] |