aboutsummaryrefslogtreecommitdiffstats
path: root/test
diff options
context:
space:
mode:
authorReed Kotler <rkotler@mips.com>2013-02-19 00:20:58 +0000
committerReed Kotler <rkotler@mips.com>2013-02-19 00:20:58 +0000
commitf80167520740cbd9b73ead4fa524533532c5538e (patch)
tree07ffbb0ac495f1e47ff3a6f10af9ca2ef1fc4831 /test
parent56f58ad0e415fcc390cdd4f891e6bf936f0dcf53 (diff)
downloadexternal_llvm-f80167520740cbd9b73ead4fa524533532c5538e.zip
external_llvm-f80167520740cbd9b73ead4fa524533532c5538e.tar.gz
external_llvm-f80167520740cbd9b73ead4fa524533532c5538e.tar.bz2
Expand pseudos BteqzT8CmpiX16 and BtnezT8CmpiX16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175474 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/Mips/seleqk.ll91
-rw-r--r--test/CodeGen/Mips/selnek.ll107
2 files changed, 198 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/seleqk.ll b/test/CodeGen/Mips/seleqk.ll
new file mode 100644
index 0000000..3ca622d
--- /dev/null
+++ b/test/CodeGen/Mips/seleqk.ll
@@ -0,0 +1,91 @@
+; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=16
+
+@t = global i32 10, align 4
+@f = global i32 199, align 4
+@a = global i32 1, align 4
+@b = global i32 1000, align 4
+@z1 = common global i32 0, align 4
+@z2 = common global i32 0, align 4
+@z3 = common global i32 0, align 4
+@z4 = common global i32 0, align 4
+@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1
+
+define void @calc_seleqk() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" {
+entry:
+ %0 = load i32* @a, align 4
+ %cmp = icmp eq i32 %0, 1
+ br i1 %cmp, label %cond.true, label %cond.false
+
+cond.true: ; preds = %entry
+ %1 = load i32* @t, align 4
+ br label %cond.end
+
+cond.false: ; preds = %entry
+ %2 = load i32* @f, align 4
+ br label %cond.end
+
+cond.end: ; preds = %cond.false, %cond.true
+ %cond = phi i32 [ %1, %cond.true ], [ %2, %cond.false ]
+ store i32 %cond, i32* @z1, align 4
+ %3 = load i32* @a, align 4
+ %cmp1 = icmp eq i32 %3, 1000
+ br i1 %cmp1, label %cond.true2, label %cond.false3
+
+cond.true2: ; preds = %cond.end
+ %4 = load i32* @f, align 4
+ br label %cond.end4
+
+cond.false3: ; preds = %cond.end
+ %5 = load i32* @t, align 4
+ br label %cond.end4
+
+cond.end4: ; preds = %cond.false3, %cond.true2
+ %cond5 = phi i32 [ %4, %cond.true2 ], [ %5, %cond.false3 ]
+ store i32 %cond5, i32* @z2, align 4
+ %6 = load i32* @b, align 4
+ %cmp6 = icmp eq i32 %6, 3
+ br i1 %cmp6, label %cond.true7, label %cond.false8
+
+cond.true7: ; preds = %cond.end4
+ %7 = load i32* @f, align 4
+ br label %cond.end9
+
+cond.false8: ; preds = %cond.end4
+ %8 = load i32* @t, align 4
+ br label %cond.end9
+
+cond.end9: ; preds = %cond.false8, %cond.true7
+ %cond10 = phi i32 [ %7, %cond.true7 ], [ %8, %cond.false8 ]
+ store i32 %cond10, i32* @z3, align 4
+ %9 = load i32* @b, align 4
+ %cmp11 = icmp eq i32 %9, 1000
+ br i1 %cmp11, label %cond.true12, label %cond.false13
+
+cond.true12: ; preds = %cond.end9
+ %10 = load i32* @t, align 4
+ br label %cond.end14
+
+cond.false13: ; preds = %cond.end9
+ %11 = load i32* @f, align 4
+ br label %cond.end14
+
+cond.end14: ; preds = %cond.false13, %cond.true12
+ %cond15 = phi i32 [ %10, %cond.true12 ], [ %11, %cond.false13 ]
+ store i32 %cond15, i32* @z4, align 4
+ ret void
+}
+
+attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" }
+attributes #1 = { "target-cpu"="mips16" "target-features"="+mips16,+o32" }
+
+; 16: cmpi ${{[0-9]+}}, 1 # 16 bit inst
+; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}
+
+; 16: cmpi ${{[0-9]+}}, 1000
+; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}
+
+; 16: cmpi ${{[0-9]+}}, 3 # 16 bit inst
+; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}
+
+; 16: cmpi ${{[0-9]+}}, 1000
+; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}
diff --git a/test/CodeGen/Mips/selnek.ll b/test/CodeGen/Mips/selnek.ll
new file mode 100644
index 0000000..2601552
--- /dev/null
+++ b/test/CodeGen/Mips/selnek.ll
@@ -0,0 +1,107 @@
+; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=16
+
+@t = global i32 10, align 4
+@f = global i32 199, align 4
+@a = global i32 1, align 4
+@b = global i32 1000, align 4
+@z1 = common global i32 0, align 4
+@z2 = common global i32 0, align 4
+@z3 = common global i32 0, align 4
+@z4 = common global i32 0, align 4
+@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1
+
+define void @calc_z() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" {
+entry:
+ %0 = load i32* @a, align 4
+ %cmp = icmp ne i32 %0, 1
+ br i1 %cmp, label %cond.true, label %cond.false
+
+cond.true: ; preds = %entry
+ %1 = load i32* @f, align 4
+ br label %cond.end
+
+cond.false: ; preds = %entry
+ %2 = load i32* @t, align 4
+ br label %cond.end
+
+cond.end: ; preds = %cond.false, %cond.true
+ %cond = phi i32 [ %1, %cond.true ], [ %2, %cond.false ]
+ store i32 %cond, i32* @z1, align 4
+ %3 = load i32* @a, align 4
+ %cmp1 = icmp ne i32 %3, 1000
+ br i1 %cmp1, label %cond.true2, label %cond.false3
+
+cond.true2: ; preds = %cond.end
+ %4 = load i32* @t, align 4
+ br label %cond.end4
+
+cond.false3: ; preds = %cond.end
+ %5 = load i32* @f, align 4
+ br label %cond.end4
+
+cond.end4: ; preds = %cond.false3, %cond.true2
+ %cond5 = phi i32 [ %4, %cond.true2 ], [ %5, %cond.false3 ]
+ store i32 %cond5, i32* @z2, align 4
+ %6 = load i32* @b, align 4
+ %cmp6 = icmp ne i32 %6, 3
+ br i1 %cmp6, label %cond.true7, label %cond.false8
+
+cond.true7: ; preds = %cond.end4
+ %7 = load i32* @t, align 4
+ br label %cond.end9
+
+cond.false8: ; preds = %cond.end4
+ %8 = load i32* @f, align 4
+ br label %cond.end9
+
+cond.end9: ; preds = %cond.false8, %cond.true7
+ %cond10 = phi i32 [ %7, %cond.true7 ], [ %8, %cond.false8 ]
+ store i32 %cond10, i32* @z3, align 4
+ %9 = load i32* @b, align 4
+ %cmp11 = icmp ne i32 %9, 1000
+ br i1 %cmp11, label %cond.true12, label %cond.false13
+
+cond.true12: ; preds = %cond.end9
+ %10 = load i32* @f, align 4
+ br label %cond.end14
+
+cond.false13: ; preds = %cond.end9
+ %11 = load i32* @t, align 4
+ br label %cond.end14
+
+cond.end14: ; preds = %cond.false13, %cond.true12
+ %cond15 = phi i32 [ %10, %cond.true12 ], [ %11, %cond.false13 ]
+ store i32 %cond15, i32* @z4, align 4
+ ret void
+}
+
+define i32 @main() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" {
+entry:
+ call void @calc_z() "target-cpu"="mips16" "target-features"="+mips16,+o32"
+ %0 = load i32* @z1, align 4
+ %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %0) "target-cpu"="mips16" "target-features"="+mips16,+o32"
+ %1 = load i32* @z2, align 4
+ %call1 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1) "target-cpu"="mips16" "target-features"="+mips16,+o32"
+ %2 = load i32* @z3, align 4
+ %call2 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %2) "target-cpu"="mips16" "target-features"="+mips16,+o32"
+ %3 = load i32* @z4, align 4
+ %call3 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %3) "target-cpu"="mips16" "target-features"="+mips16,+o32"
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...) "target-cpu"="mips16" "target-features"="+mips16,+o32"
+
+attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" }
+attributes #1 = { "target-cpu"="mips16" "target-features"="+mips16,+o32" }
+
+; 16: cmpi ${{[0-9]+}}, 1 # 16 bit inst
+; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}}
+
+; 16: cmpi ${{[0-9]+}}, 1000
+; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}}
+
+; 16: cmpi ${{[0-9]+}}, 3 # 16 bit inst
+; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}}
+
+; 16: cmpi ${{[0-9]+}}, 1000
+; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} \ No newline at end of file