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| author | Richard Barton <richard.barton@arm.com> | 2012-07-10 12:51:09 +0000 |
|---|---|---|
| committer | Richard Barton <richard.barton@arm.com> | 2012-07-10 12:51:09 +0000 |
| commit | fae96f17b4b022fccd94a143698112a17d8ddf05 (patch) | |
| tree | 2e3dd08f996768f671cc1e8600a617e43b112c48 /test | |
| parent | 97a0c6bc91bf31fa701dda478d9616c2de6b2393 (diff) | |
| download | external_llvm-fae96f17b4b022fccd94a143698112a17d8ddf05.zip external_llvm-fae96f17b4b022fccd94a143698112a17d8ddf05.tar.gz external_llvm-fae96f17b4b022fccd94a143698112a17d8ddf05.tar.bz2 | |
Fix instruction description of VMOV (between two ARM core registers and two single-precision resiters) (and do it properly this time!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159989 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/ARM/simple-fp-encoding.s | 21 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/neon.txt | 21 |
2 files changed, 41 insertions, 1 deletions
diff --git a/test/MC/ARM/simple-fp-encoding.s b/test/MC/ARM/simple-fp-encoding.s index a766b95..2a22620 100644 --- a/test/MC/ARM/simple-fp-encoding.s +++ b/test/MC/ARM/simple-fp-encoding.s @@ -196,6 +196,27 @@ @ CHECK: vmov r0, r1, d16 @ encoding: [0x30,0x0b,0x51,0xec] vmov r0, r1, d16 +@ Between two single precision registers and two core registers + vmov s3, s4, r1, r2 + vmov s2, s3, r1, r2 + vmov r1, r2, s3, s4 + vmov r1, r2, s2, s3 +@ CHECK: vmov s3, s4, r1, r2 @ encoding: [0x31,0x1a,0x42,0xec] +@ CHECK: vmov s2, s3, r1, r2 @ encoding: [0x11,0x1a,0x42,0xec] +@ CHECK: vmov r1, r2, s3, s4 @ encoding: [0x31,0x1a,0x52,0xec] +@ CHECK: vmov r1, r2, s2, s3 @ encoding: [0x11,0x1a,0x52,0xec] + +@ Between one double precision register and two core registers + vmov d15, r1, r2 + vmov d16, r1, r2 + vmov r1, r2, d15 + vmov r1, r2, d16 +@ CHECK: vmov d15, r1, r2 @ encoding: [0x1f,0x1b,0x42,0xec] +@ CHECK: vmov d16, r1, r2 @ encoding: [0x30,0x1b,0x42,0xec] +@ CHECK: vmov r1, r2, d15 @ encoding: [0x1f,0x1b,0x52,0xec] +@ CHECK: vmov r1, r2, d16 @ encoding: [0x30,0x1b,0x52,0xec] + + @ CHECK: vldr d17, [r0] @ encoding: [0x00,0x1b,0xd0,0xed] @ CHECK: vldr s0, [lr] @ encoding: [0x00,0x0a,0x9e,0xed] @ CHECK: vldr d0, [lr] @ encoding: [0x00,0x0b,0x9e,0xed] diff --git a/test/MC/Disassembler/ARM/neon.txt b/test/MC/Disassembler/ARM/neon.txt index bd60895..96f8303 100644 --- a/test/MC/Disassembler/ARM/neon.txt +++ b/test/MC/Disassembler/ARM/neon.txt @@ -1895,7 +1895,26 @@ # CHECK: vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0]! 0x3d 0x2a 0x5e 0x6c -# CHECK: vmovvs r2, lr, s29, s30 +# CHECK: vmovvs r2, lr, s27, s28 + +0x31 0x1a 0x42 0xec +0x11 0x1a 0x42 0xec +0x31 0x1a 0x52 0xec +0x11 0x1a 0x52 0xec +# CHECK: vmov s3, s4, r1, r2 +# CHECK: vmov s2, s3, r1, r2 +# CHECK: vmov r1, r2, s3, s4 +# CHECK: vmov r1, r2, s2, s3 + +0x1f 0x1b 0x42 0xec +0x30 0x1b 0x42 0xec +0x1f 0x1b 0x52 0xec +0x30 0x1b 0x52 0xec +# CHECK: vmov d15, r1, r2 +# CHECK: vmov d16, r1, r2 +# CHECK: vmov r1, r2, d15 +# CHECK: vmov r1, r2, d16 + 0xe9 0x1a 0xb2 0x4e # CHECK: vcvttmi.f32.f16 s2, s19 |