diff options
author | Silviu Baranga <silviu.baranga@arm.com> | 2013-07-29 09:25:50 +0000 |
---|---|---|
committer | Silviu Baranga <silviu.baranga@arm.com> | 2013-07-29 09:25:50 +0000 |
commit | fd79485dfa4fee67467299720efac2d0c21d846c (patch) | |
tree | 0c3ee3a4ee3a79be8c5f48ad650386d4aa60c749 /test | |
parent | 3d906e9846361b494115e7a26625bdc435fdd5b1 (diff) | |
download | external_llvm-fd79485dfa4fee67467299720efac2d0c21d846c.zip external_llvm-fd79485dfa4fee67467299720efac2d0c21d846c.tar.gz external_llvm-fd79485dfa4fee67467299720efac2d0c21d846c.tar.bz2 |
Allow generation of vmla.f32 instructions when targeting Cortex-A15. The patch also adds the VFP4 feature to Cortex-A15 and fixes the DontUseFusedMAC predicate so that we can still generate vmla.f32 instructions on non-darwin targets with VFP4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187349 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/ARM/a15-mla.ll | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/a15-mla.ll b/test/CodeGen/ARM/a15-mla.ll index 25f6de4..b233cc2 100644 --- a/test/CodeGen/ARM/a15-mla.ll +++ b/test/CodeGen/ARM/a15-mla.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=arm -float-abi=hard -mcpu=cortex-a15 -mattr=+neon,+neonfp | FileCheck %s ; This test checks that the VMLxForwarting feature is disabled for A15. -; CHECK: fun_a +; CHECK: fun_a: define <4 x i32> @fun_a(<4 x i32> %x, <4 x i32> %y) nounwind{ %1 = add <4 x i32> %x, %y ; CHECK-NOT: vmul @@ -10,3 +10,27 @@ define <4 x i32> @fun_a(<4 x i32> %x, <4 x i32> %y) nounwind{ %3 = add <4 x i32> %y, %2 ret <4 x i32> %3 } + +; This tests checks that VMLA FP patterns can be matched in instruction selection when targeting +; Cortex-A15. +; CHECK: fun_b: +define <4 x float> @fun_b(<4 x float> %x, <4 x float> %y, <4 x float> %z) nounwind{ +; CHECK: vmla.f32 + %t = fmul <4 x float> %x, %y + %r = fadd <4 x float> %t, %z + ret <4 x float> %r +} + +; This tests checks that FP VMLA instructions are not expanded into separate multiply/addition +; operations when targeting Cortex-A15. +; CHECK: fun_c: +define <4 x float> @fun_c(<4 x float> %x, <4 x float> %y, <4 x float> %z, <4 x float> %u, <4 x float> %v) nounwind{ +; CHECK: vmla.f32 + %t1 = fmul <4 x float> %x, %y + %r1 = fadd <4 x float> %t1, %z +; CHECK: vmla.f32 + %t2 = fmul <4 x float> %u, %v + %r2 = fadd <4 x float> %t2, %r1 + ret <4 x float> %r2 +} + |