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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-10-30 14:45:14 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-10-30 14:45:14 +0000 |
| commit | 6ff1ef9931b50763a40e9ae8696cfab9e25cf4de (patch) | |
| tree | 3a212fbec02bbe355534190b163a19779eb8a134 /unittests | |
| parent | a7c3cac87118c3e409a7fc889090c5ffe242985e (diff) | |
| download | external_llvm-6ff1ef9931b50763a40e9ae8696cfab9e25cf4de.zip external_llvm-6ff1ef9931b50763a40e9ae8696cfab9e25cf4de.tar.gz external_llvm-6ff1ef9931b50763a40e9ae8696cfab9e25cf4de.tar.bz2 | |
[mips][msa] Added support for matching bins[lr]i.[bhwd] from normal IR (i.e. not intrinsics)
This required correcting the definition of the bins[lr]i intrinsics because
the result is also the first operand.
It also required removing the (arbitrary) check for 32-bit immediates in
MipsSEDAGToDAGISel::selectVSplat().
Currently using binsli.d with 2 bits set in the mask doesn't select binsli.d
because the constant is legalized into a ConstantPool. Similar things can
happen with binsri.d with more than 10 bits set in the mask. The resulting
code when this happens is correct but not optimal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193687 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'unittests')
0 files changed, 0 insertions, 0 deletions