Fix some tablegen issues to allow using zero_reg for InstAlias definitions.

This is needed to allow an InstAlias for an instruction with an "OptionalDef"
result register (like ARM's cc_out) where you want to set the optional register
to reg0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123490 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 15 insertions, 0 deletions

diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp
index a28b1d5..08005fb 100644
--- a/utils/TableGen/CodeGenInstruction.cpp
+++ b/utils/TableGen/CodeGenInstruction.cpp
@@ -442,6 +442,21 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
         ++AliasOpNo;
         continue;
       }
+      if (ADI->getDef()->getName() == "zero_reg") {
+        if (!Result->getArgName(AliasOpNo).empty())
+          throw TGError(R->getLoc(), "result fixed register argument must "
+                        "not have a name!");
+
+        // Check if this is an optional def.
+        if (!ResultOpRec->isSubClassOf("OptionalDefOperand"))
+          throw TGError(R->getLoc(), "reg0 used for result that is not an "
+                        "OptionalDefOperand!");
+
+        // Now that it is validated, add it.
+        ResultOperands.push_back(ResultOperand(static_cast<Record*>(0)));
+        ++AliasOpNo;
+        continue;
+      }
     }
     
     // If the operand is a record, it must have a name, and the record type must