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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-08 08:55:49 -0700 |
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committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-09 15:04:38 -0700 |
commit | 4c5e43da7792f75567b693105cc53e3f1992ad98 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /utils/TableGen/CodeGenRegisters.h | |
parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
download | external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.zip external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.gz external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.bz2 |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
Diffstat (limited to 'utils/TableGen/CodeGenRegisters.h')
-rw-r--r-- | utils/TableGen/CodeGenRegisters.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h index 7c723d9..00e2957 100644 --- a/utils/TableGen/CodeGenRegisters.h +++ b/utils/TableGen/CodeGenRegisters.h @@ -18,6 +18,7 @@ #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/BitVector.h" #include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SetVector.h" #include "llvm/ADT/SparseBitVector.h" #include "llvm/CodeGen/MachineValueType.h" @@ -41,10 +42,10 @@ namespace llvm { struct MaskRolPair { unsigned Mask; uint8_t RotateLeft; - bool operator==(const MaskRolPair Other) { + bool operator==(const MaskRolPair Other) const { return Mask == Other.Mask && RotateLeft == Other.RotateLeft; } - bool operator!=(const MaskRolPair Other) { + bool operator!=(const MaskRolPair Other) const { return Mask != Other.Mask || RotateLeft != Other.RotateLeft; } }; @@ -128,6 +129,7 @@ namespace llvm { unsigned EnumValue; unsigned CostPerUse; bool CoveredBySubRegs; + bool HasDisjunctSubRegs; // Map SubRegIndex -> Register. typedef std::map<CodeGenSubRegIndex *, CodeGenRegister *, deref<llvm::less>> @@ -306,6 +308,8 @@ namespace llvm { std::string AltOrderSelect; /// Contains the combination of the lane masks of all subregisters. unsigned LaneMask; + /// True if there are at least 2 subregisters which do not interfere. + bool HasDisjunctSubRegs; // Return the Record that defined this class, or NULL if the class was // created by TableGen. |