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author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2013-05-22 20:09:24 +0000 |
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committer | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2013-05-22 20:09:24 +0000 |
commit | 5cd01f74b11dc3e1c08c3ddea067af8203079b87 (patch) | |
tree | 79027122ee83f90f58af25e34b2493a9fd6bd587 /utils/TableGen | |
parent | 3f75c6cfb575917c8c112b2de9593cb860f79e56 (diff) | |
download | external_llvm-5cd01f74b11dc3e1c08c3ddea067af8203079b87.zip external_llvm-5cd01f74b11dc3e1c08c3ddea067af8203079b87.tar.gz external_llvm-5cd01f74b11dc3e1c08c3ddea067af8203079b87.tar.bz2 |
Change some PowerPC PatLeaf definitions to ImmLeaf for fast-isel.
Using PatLeaf rather than ImmLeaf when defining immediate predicates
prevents simple patterns using those predicates from being recognized
for fast instruction selection. This patch replaces the immSExt16
PatLeaf predicate with two ImmLeaf predicates, imm32SExt16 and
imm64SExt16, allowing a few more patterns to be recognized (ADDI,
ADDIC, MULLI, ADDI8, and ADDIC8). Using the new predicates does not
help for LI, LI8, SUBFIC, and SUBFIC8 because these are rejected for
other reasons, but I see no reason to retain the PatLeaf predicate.
No functional change intended, and thus no test cases yet. This is
preliminary work for enabling fast-isel support for PowerPC. When
that support is ready, we'll be able to test this function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182510 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen')
0 files changed, 0 insertions, 0 deletions