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authorJim Grosbach <grosbach@apple.com>2011-03-10 23:56:09 +0000
committerJim Grosbach <grosbach@apple.com>2011-03-10 23:56:09 +0000
commitd4a16ad85d991ff12487b40ef248833448047ead (patch)
tree5d03d83f2200e710283f8f5141194475b6cd0990 /utils/TableGen
parentc9f2f61d3426d30605b22ccbd112272d1d36cd28 (diff)
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Properly pseudo-ize MOVCCr and MOVCCs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127434 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen')
-rw-r--r--utils/TableGen/ARMDecoderEmitter.cpp7
1 files changed, 3 insertions, 4 deletions
diff --git a/utils/TableGen/ARMDecoderEmitter.cpp b/utils/TableGen/ARMDecoderEmitter.cpp
index 53e1be1..9119219 100644
--- a/utils/TableGen/ARMDecoderEmitter.cpp
+++ b/utils/TableGen/ARMDecoderEmitter.cpp
@@ -1606,13 +1606,12 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
// better off using the generic RSCri and RSCrs instructions.
if (Name == "RSCSri" || Name == "RSCSrs") return false;
- // MOVCCr, MOVCCs, MOVCCi, MOVCCi16, FCYPScc, FCYPDcc, FNEGScc, and
+ // MOVCCi, MOVCCi16, FCYPScc, FCYPDcc, FNEGScc, and
// FNEGDcc are used in the compiler to implement conditional moves.
// We can ignore them in favor of their more generic versions of
// instructions. See also SDNode *ARMDAGToDAGISel::Select(SDValue Op).
- if (Name == "MOVCCr" || Name == "MOVCCs" || Name == "MOVCCi" ||
- Name == "MOVCCi16" || Name == "FCPYScc" || Name == "FCPYDcc" ||
- Name == "FNEGScc" || Name == "FNEGDcc")
+ if (Name == "MOVCCi" || Name == "MOVCCi16" || Name == "FCPYScc" ||
+ Name == "FCPYDcc" || Name == "FNEGScc" || Name == "FNEGDcc")
return false;
// Ditto for VMOVDcc, VMOVScc, VNEGDcc, and VNEGScc.