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authorAnton Korobeynikov <asl@math.spbu.ru>2009-08-21 12:41:24 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2009-08-21 12:41:24 +0000
commit1c8e581832440a114c9587d41473d107de4cac74 (patch)
tree63f010dd63d0a82ef6637a5be3bf297b94edf795 /utils
parentc9d44f0d9c609f86e13fbf2e27165b663f94efe3 (diff)
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Add lowering of ARM 4-element shuffles to multiple instructios via perfectshuffle-generated table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79624 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/PerfectShuffle/PerfectShuffle.cpp75
1 files changed, 73 insertions, 2 deletions
diff --git a/utils/PerfectShuffle/PerfectShuffle.cpp b/utils/PerfectShuffle/PerfectShuffle.cpp
index 0ec42f1..7a42d02 100644
--- a/utils/PerfectShuffle/PerfectShuffle.cpp
+++ b/utils/PerfectShuffle/PerfectShuffle.cpp
@@ -444,8 +444,6 @@ int main() {
}
-#define GENERATE_ALTIVEC
-
#ifdef GENERATE_ALTIVEC
///===---------------------------------------------------------------------===//
@@ -498,3 +496,76 @@ vsldoi<2> the_vsldoi2("vsldoi8" , OP_VSLDOI8);
vsldoi<3> the_vsldoi3("vsldoi12", OP_VSLDOI12);
#endif
+
+#define GENERATE_NEON
+
+#ifdef GENERATE_NEON
+enum {
+ OP_COPY = 0, // Copy, used for things like <u,u,u,3> to say it is <0,1,2,3>
+ OP_VREV,
+ OP_VDUP0,
+ OP_VDUP1,
+ OP_VDUP2,
+ OP_VDUP3,
+ OP_VEXT1,
+ OP_VEXT2,
+ OP_VEXT3,
+ OP_VUZPL, // VUZP, left result
+ OP_VUZPR, // VUZP, right result
+ OP_VZIPL, // VZIP, left result
+ OP_VZIPR, // VZIP, right result
+ OP_VTRNL, // VTRN, left result
+ OP_VTRNR // VTRN, right result
+};
+
+struct vrev : public Operator {
+ vrev() : Operator(0x1032, "vrev", OP_VREV) {}
+} the_vrev;
+
+template<unsigned Elt>
+struct vdup : public Operator {
+ vdup(const char *N, unsigned Opc)
+ : Operator(MakeMask(Elt, Elt, Elt, Elt), N, Opc) {}
+};
+
+vdup<0> the_vdup0("vdup0", OP_VDUP0);
+vdup<1> the_vdup1("vdup1", OP_VDUP1);
+vdup<2> the_vdup2("vdup2", OP_VDUP2);
+vdup<3> the_vdup3("vdup3", OP_VDUP3);
+
+template<unsigned N>
+struct vext : public Operator {
+ vext(const char *Name, unsigned Opc)
+ : Operator(MakeMask(N&7, (N+1)&7, (N+2)&7, (N+3)&7), Name, Opc) {
+ }
+};
+
+vext<1> the_vext1("vext1", OP_VEXT1);
+vext<2> the_vext2("vext2", OP_VEXT2);
+vext<3> the_vext3("vext3", OP_VEXT3);
+
+struct vuzpl : public Operator {
+ vuzpl() : Operator(0x1032, "vuzpl", OP_VUZPL, 2) {}
+} the_vuzpl;
+
+struct vuzpr : public Operator {
+ vuzpr() : Operator(0x4602, "vuzpr", OP_VUZPR, 2) {}
+} the_vuzpr;
+
+struct vzipl : public Operator {
+ vzipl() : Operator(0x6273, "vzipl", OP_VZIPL, 2) {}
+} the_vzipl;
+
+struct vzipr : public Operator {
+ vzipr() : Operator(0x4051, "vzipr", OP_VZIPR, 2) {}
+} the_vzipr;
+
+struct vtrnl : public Operator {
+ vtrnl() : Operator(0x5173, "vtrnl", OP_VTRNL, 2) {}
+} the_vtrnl;
+
+struct vtrnr : public Operator {
+ vtrnr() : Operator(0x4062, "vtrnr", OP_VTRNR, 2) {}
+} the_vtrnr;
+
+#endif