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| author | Evan Cheng <evan.cheng@apple.com> | 2007-05-16 20:45:24 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-05-16 20:45:24 +0000 |
| commit | 5127ce09a4e4379f971280fab461a5f03befddbc (patch) | |
| tree | 8c26224b7e3fd9bc95a78d953b57f2889c14e9a7 /utils | |
| parent | 1bccb49082a8049d296dcdb2a741929437b6176f (diff) | |
| download | external_llvm-5127ce09a4e4379f971280fab461a5f03befddbc.zip external_llvm-5127ce09a4e4379f971280fab461a5f03befddbc.tar.gz external_llvm-5127ce09a4e4379f971280fab461a5f03befddbc.tar.bz2 | |
Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37116 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
| -rw-r--r-- | utils/TableGen/CodeGenInstruction.h | 2 | ||||
| -rw-r--r-- | utils/TableGen/CodeGenTarget.cpp | 4 | ||||
| -rw-r--r-- | utils/TableGen/InstrInfoEmitter.cpp | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h index 9a29958..687c17f 100644 --- a/utils/TableGen/CodeGenInstruction.h +++ b/utils/TableGen/CodeGenInstruction.h @@ -87,7 +87,7 @@ namespace llvm { bool isCall; bool isLoad; bool isStore; - bool isPredicated; + bool isPredicable; bool isConvertibleToThreeAddress; bool isCommutable; bool isTerminator; diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index 151295f..7d2e7b3 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -356,7 +356,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr) isLoad = R->getValueAsBit("isLoad"); isStore = R->getValueAsBit("isStore"); bool isTwoAddress = R->getValueAsBit("isTwoAddress"); - isPredicated = false; // set below. + isPredicable = R->getValueAsBit("isPredicable"); isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress"); isCommutable = R->getValueAsBit("isCommutable"); isTerminator = R->getValueAsBit("isTerminator"); @@ -404,7 +404,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr) if (unsigned NumArgs = MIOpInfo->getNumArgs()) NumOps = NumArgs; - isPredicated |= Rec->isSubClassOf("PredicateOperand"); + isPredicable |= Rec->isSubClassOf("PredicateOperand"); } else if (Rec->getName() == "variable_ops") { hasVariableNumberOfOperands = true; continue; diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index 4db92bd..090c35b 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -236,7 +236,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, if (Inst.isCall) OS << "|M_CALL_FLAG"; if (Inst.isLoad) OS << "|M_LOAD_FLAG"; if (Inst.isStore || isStore) OS << "|M_STORE_FLAG"; - if (Inst.isPredicated) OS << "|M_PREDICATED"; + if (Inst.isPredicable) OS << "|M_PREDICABLE"; if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR"; if (Inst.isCommutable) OS << "|M_COMMUTABLE"; if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG"; |