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authorChris Lattner <sabre@nondot.org>2010-11-06 08:20:59 +0000
committerChris Lattner <sabre@nondot.org>2010-11-06 08:20:59 +0000
commit5bde7345980587284bda6d42a68cdb151fbf5d6b (patch)
tree9e1d781b17992d0556189788a90f7b189e809a85 /utils
parent5e262bc94342b4ce277206cb739b98b80b8b0d2b (diff)
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fix a bug where we had an implicit assumption that the
result instruction operand numbering matched the result pattern. Fixing this allows us to move the xchg/test aliases to the .td file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118334 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/AsmMatcherEmitter.cpp5
-rw-r--r--utils/TableGen/CodeGenInstruction.cpp18
-rw-r--r--utils/TableGen/CodeGenInstruction.h5
3 files changed, 26 insertions, 2 deletions
diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp
index 6a70c5a..23d370c 100644
--- a/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1171,13 +1171,14 @@ void AsmMatcherInfo::BuildAliasOperandReference(MatchableInfo *II,
StringRef OperandName,
MatchableInfo::AsmOperand &Op) {
const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>();
-
+
// Set up the operand class.
for (unsigned i = 0, e = CGA.ResultOperands.size(); i != e; ++i)
if (CGA.ResultOperands[i].Name == OperandName) {
// It's safe to go with the first one we find, because CodeGenInstAlias
// validates that all operands with the same name have the same record.
- Op.Class = getOperandClass(CGA.ResultInst->Operands[i]);
+ unsigned ResultIdx =CGA.getResultInstOperandIndexForResultOperandIndex(i);
+ Op.Class = getOperandClass(CGA.ResultInst->Operands[ResultIdx]);
Op.SrcOpName = OperandName;
return;
}
diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp
index 73b7b78..40d4206 100644
--- a/utils/TableGen/CodeGenInstruction.cpp
+++ b/utils/TableGen/CodeGenInstruction.cpp
@@ -459,3 +459,21 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
" instruction expects " + utostr(ResultInst->Operands.size())+
" operands!");
}
+
+/// getResultInstOperandIndexForResultOperandIndex - Given an index into the
+/// ResultOperands array, translate it to a valid index in ResultInst's
+/// operand list.
+unsigned CodeGenInstAlias::
+getResultInstOperandIndexForResultOperandIndex(unsigned OpNo) const {
+ unsigned OpIdx = 0;
+
+ for (unsigned i = 0;; ++i) {
+ assert(i != ResultInst->Operands.size() && "Didn't find entry");
+ if (ResultInst->Operands[i].getTiedRegister() != -1)
+ continue;
+
+ if (OpIdx == OpNo) return i;
+
+ ++OpIdx;
+ }
+}
diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h
index 0e636a8..f5b2239 100644
--- a/utils/TableGen/CodeGenInstruction.h
+++ b/utils/TableGen/CodeGenInstruction.h
@@ -277,6 +277,11 @@ namespace llvm {
std::vector<ResultOperand> ResultOperands;
CodeGenInstAlias(Record *R, CodeGenTarget &T);
+
+ /// getResultInstOperandIndexForResultOperandIndex - Given an index into the
+ /// ResultOperands array, translate it to a valid index in ResultInst's
+ /// operand list.
+ unsigned getResultInstOperandIndexForResultOperandIndex(unsigned i) const;
};
}