Prefer cheap registers for busy live ranges.

On the x86-64 and thumb2 targets, some registers are more expensive to encode
than others in the same register class.

Add a CostPerUse field to the TableGen register description, and make it
available from TRI->getCostPerUse. This represents the cost of a REX prefix or a
32-bit instruction encoding required by choosing a high register.

Teach the greedy register allocator to prefer cheap registers for busy live
ranges (as indicated by spill weight).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129864 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 6 insertions, 3 deletions

diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h
index f6d6af8..1a876e1 100644
--- a/utils/TableGen/CodeGenRegisters.h
+++ b/utils/TableGen/CodeGenRegisters.h
@@ -31,6 +31,7 @@ namespace llvm {
     const std::string &getName() const;
     unsigned DeclaredSpillSize, DeclaredSpillAlignment;
     unsigned EnumValue;
+    unsigned CostPerUse;
     CodeGenRegister(Record *R);
   };
 
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index cc09c8d..c9ccb96 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -172,6 +172,7 @@ void CodeGenTarget::ReadRegisters() const {
 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
   DeclaredSpillSize = R->getValueAsInt("SpillSize");
   DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
+  CostPerUse = R->getValueAsInt("CostPerUse");
 }
 
 const std::string &CodeGenRegister::getName() const {
diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index b3a9dea..4ddc47d 100644
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -841,7 +841,7 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
   }
 
   OS<<"\n  const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
-  OS << "    { \"NOREG\",\t0,\t0,\t0 },\n";
+  OS << "    { \"NOREG\",\t0,\t0,\t0,\t0 },\n";
 
   // Now that register alias and sub-registers sets have been emitted, emit the
   // register descriptors now.
@@ -854,9 +854,10 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
     else
       OS << "Empty_SubRegsSet,\t";
     if (!RegisterSuperRegs[Reg.TheDef].empty())
-      OS << Reg.getName() << "_SuperRegsSet },\n";
+      OS << Reg.getName() << "_SuperRegsSet,\t";
     else
-      OS << "Empty_SuperRegsSet },\n";
+      OS << "Empty_SuperRegsSet,\t";
+    OS << Reg.CostPerUse << " },\n";
   }
   OS << "  };\n";      // End of register descriptors...